diff -Ncr linux-5.11.1/arch/sh/boards/Kconfig linux-5.11.1-shmin/arch/sh/boards/Kconfig *** linux-5.11.1/arch/sh/boards/Kconfig 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/boards/Kconfig 2022-04-18 22:35:23.251125745 +0900 *************** *** 314,320 **** config SH_SHMIN bool "SHMIN" ! depends on CPU_SUBTYPE_SH7706 select CPU_HAS_IPR_IRQ help Select SHMIN if configuring for the SHMIN board. --- 314,320 ---- config SH_SHMIN bool "SHMIN" ! depends on CPU_SUBTYPE_SH7706 || CPU_SUBTYPE_SH7721 select CPU_HAS_IPR_IRQ help Select SHMIN if configuring for the SHMIN board. diff -Ncr linux-5.11.1/arch/sh/boards/board-shmin.c linux-5.11.1-shmin/arch/sh/boards/board-shmin.c *** linux-5.11.1/arch/sh/boards/board-shmin.c 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/boards/board-shmin.c 2022-04-18 22:35:23.251125745 +0900 *************** *** 1,35 **** // SPDX-License-Identifier: GPL-2.0 /* ! * arch/sh/boards/shmin/setup.c * ! * Copyright (C) 2006 Takashi YOSHII ! * ! * SHMIN Support. */ #include #include ! #include #include ! #include ! #include ! #define PFC_PHCR 0xa400010eUL ! #define INTC_ICR1 0xa4000010UL ! static void __init init_shmin_irq(void) { ! __raw_writew(0x2a00, PFC_PHCR); // IRQ0-3=IRQ __raw_writew(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. plat_irq_setup_pins(IRQ_MODE_IRQ); } static void __init shmin_setup(char **cmdline_p) { ! __set_io_port_base(SHMIN_IO_BASE); } ! static struct sh_machine_vector mv_shmin __initmv = { ! .mv_name = "SHMIN", .mv_setup = shmin_setup, ! .mv_init_irq = init_shmin_irq, }; --- 1,172 ---- // SPDX-License-Identifier: GPL-2.0 /* ! * SHMIN board support. * ! * Copyright (C) 2010 Yukio Mituiwa */ #include #include ! #include ! #include ! #include #include ! #include ! ! #if defined(CONFIG_CPU_SUBTYPE_SH7706) ! #define PFC_PHCR 0xa400010eUL ! #define INTC_ICR1 0xa4000010UL ! #define BSC_BCR1 0xffffff60UL ! #define BSC_BCR2 0xffffff62UL ! #define BSC_WCR1 0xffffff64UL ! #define BSC_WCR2 0xffffff66UL ! #define PFC_PHCR 0xa400010eUL ! #define INTC_ICR1 0xa4000010UL ! #endif ! #if defined(CONFIG_CPU_SUBTYPE_SH7721) ! #define INTC_ICR1 0xa4140010UL ! #define PFC_PGCR 0xa405010cUL ! #define PFC_PHCR 0xa405010eUL ! #define PFC_PPCR 0xa4050118UL ! #define PFC_PSELA 0xa4050124UL ! #endif ! ! #define IO_ADDRESS(n) ((void __iomem *)n) ! ! #define SH7706LANV1 0 ! #define SH7706LANV2 1 ! #define SH7706USB 2 ! #define SH7706LANV3 3 ! #define SH7721V1 4 ! static int board_id; ! ! static struct resource ax88796b_res[] = { ! { ! .start = 0x10000000, ! .end = 0x10000000 + 0x1000 - 1, ! .flags = IORESOURCE_MEM, ! }, { ! .start = 34, ! .flags = IORESOURCE_IRQ, ! } ! }; ! static struct platform_device ax88796b_device = { ! .name = "ax88796b", ! .id = -1, ! .num_resources = ARRAY_SIZE(ax88796b_res), ! .resource = ax88796b_res, ! }; ! ! static struct plat_serial8250_port serial_platform_data[] = { ! { ! .membase = IO_ADDRESS(0xb0020000), ! .mapbase = 0xb0020000, ! .irq = 35, ! .irqflags = IRQF_SHARED, ! .flags = UPF_FIXED_TYPE, ! .iotype = UPIO_MEM, ! .regshift = 1, ! .uartclk = 25000000, ! .type = PORT_16750, ! }, { ! .membase = IO_ADDRESS(0xb0040000), ! .mapbase = 0xb0040000, ! .irq = 35, ! .irqflags = IRQF_SHARED, ! .flags = UPF_FIXED_TYPE, ! .iotype = UPIO_MEM, ! .regshift = 1, ! .uartclk = 25000000, ! .type = PORT_16750, ! }, { ! .flags = 0 ! } ! }; ! ! static struct platform_device serial_device = { ! .name = "serial8250", ! .id = PLAT8250_DEV_PLATFORM, ! .dev = { ! .platform_data = serial_platform_data, ! }, ! }; ! ! static struct platform_device *shmin_devices[] __initdata = { ! &ax88796b_device, ! &serial_device, ! }; ! static int __init shmin_io_init(void) { ! int ret = 0; ! ! ret |= platform_add_devices(shmin_devices, ARRAY_SIZE(shmin_devices)); ! return ret; ! } ! subsys_initcall(shmin_io_init); ! ! static void __init shmin_init_irq(void) ! { ! #if defined(CONFIG_CPU_SUBTYPE_SH7706) ! __raw_writew(0x2a00, PFC_PHCR); // IRQ0-3=IRQ __raw_writew(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. + #endif + #if defined(CONFIG_CPU_SUBTYPE_SH7721) + __raw_writew(0x0000, PFC_PPCR); // IRQ0-3=IRQ + __raw_writew(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. + #endif plat_irq_setup_pins(IRQ_MODE_IRQ); } + /* + * Initialize the board + */ static void __init shmin_setup(char **cmdline_p) { ! unsigned char data; ! unsigned int addr; ! ! printk(KERN_INFO "SHMIN Setup..."); ! addr = SHMIN_IO_BASE; ! #if defined(CONFIG_CPU_SUBTYPE_SH7706) ! /* for BSC */ ! __raw_writew(__raw_readw(BSC_BCR2) & ~0x3f00, BSC_BCR2); ! __raw_writew(__raw_readw(BSC_BCR2) | 0x1500, BSC_BCR2); ! ! board_id = SH7706LANV1; ! if(__raw_readb(SHMIN_IO_BASE + 0x8006) == 0xab) board_id = SH7706LANV2; ! if(__raw_readb(SHMIN_IO_BASE + 0x70002) == 0xcd) board_id = SH7706LANV3; ! #endif ! #if defined(CONFIG_CPU_SUBTYPE_SH7721) ! /* for USB */ ! __raw_writew(0x0000, PFC_PGCR); ! __raw_writew(0x0000, PFC_PHCR); ! __raw_writew(0x0000, PFC_PSELA); ! ! board_id = SH7721V1; ! #endif ! switch(board_id) { ! case SH7706LANV1: ! printk(KERN_INFO "This is SH7706LAN board Ver 1.0\n"); ! break; ! case SH7706LANV2: ! printk(KERN_INFO "This is SH7706LAN board Ver 2.0\n"); ! break; ! case SH7706LANV3: ! printk(KERN_INFO "This is SH7706LAN board Ver 3.0\n"); ! break; ! case SH7721V1: ! printk(KERN_INFO "This is SH7721LUL board Ver 1.0\n"); ! break; ! } ! printk(KERN_INFO " done.\n"); } ! /* ! * The Machine Vector ! */ ! struct sh_machine_vector mv_shmin __initmv = { .mv_setup = shmin_setup, ! .mv_name = "SHMIN", ! .mv_init_irq = shmin_init_irq, }; diff -Ncr linux-5.11.1/arch/sh/boot/compressed/ashiftrt.S linux-5.11.1-shmin/arch/sh/boot/compressed/ashiftrt.S *** linux-5.11.1/arch/sh/boot/compressed/ashiftrt.S 1970-01-01 09:00:00.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/boot/compressed/ashiftrt.S 2022-04-18 23:19:50.409922964 +0900 *************** *** 0 **** --- 1,128 ---- + /* SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0 + + Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, + 2004, 2005, 2006 + Free Software Foundation, Inc. + */ + + !! libgcc routines for the Renesas / SuperH SH CPUs. + !! Contributed by Steve Chamberlain. + !! sac@cygnus.com + + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines + !! recoded in assembly by Toshiyasu Morita + !! tm@netcom.com + + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and + ELF local label prefixes by J"orn Rennecke + amylaar@cygnus.com */ + + .global __ashiftrt_r4_0 + .global __ashiftrt_r4_1 + .global __ashiftrt_r4_2 + .global __ashiftrt_r4_3 + .global __ashiftrt_r4_4 + .global __ashiftrt_r4_5 + .global __ashiftrt_r4_6 + .global __ashiftrt_r4_7 + .global __ashiftrt_r4_8 + .global __ashiftrt_r4_9 + .global __ashiftrt_r4_10 + .global __ashiftrt_r4_11 + .global __ashiftrt_r4_12 + .global __ashiftrt_r4_13 + .global __ashiftrt_r4_14 + .global __ashiftrt_r4_15 + .global __ashiftrt_r4_16 + .global __ashiftrt_r4_17 + .global __ashiftrt_r4_18 + .global __ashiftrt_r4_19 + .global __ashiftrt_r4_20 + .global __ashiftrt_r4_21 + .global __ashiftrt_r4_22 + .global __ashiftrt_r4_23 + .global __ashiftrt_r4_24 + .global __ashiftrt_r4_25 + .global __ashiftrt_r4_26 + .global __ashiftrt_r4_27 + .global __ashiftrt_r4_28 + .global __ashiftrt_r4_29 + .global __ashiftrt_r4_30 + .global __ashiftrt_r4_31 + .global __ashiftrt_r4_32 + + .align 1 + __ashiftrt_r4_32: + __ashiftrt_r4_31: + rotcl r4 + rts + subc r4,r4 + __ashiftrt_r4_30: + shar r4 + __ashiftrt_r4_29: + shar r4 + __ashiftrt_r4_28: + shar r4 + __ashiftrt_r4_27: + shar r4 + __ashiftrt_r4_26: + shar r4 + __ashiftrt_r4_25: + shar r4 + __ashiftrt_r4_24: + shlr16 r4 + shlr8 r4 + rts + exts.b r4,r4 + __ashiftrt_r4_23: + shar r4 + __ashiftrt_r4_22: + shar r4 + __ashiftrt_r4_21: + shar r4 + __ashiftrt_r4_20: + shar r4 + __ashiftrt_r4_19: + shar r4 + __ashiftrt_r4_18: + shar r4 + __ashiftrt_r4_17: + shar r4 + __ashiftrt_r4_16: + shlr16 r4 + rts + exts.w r4,r4 + __ashiftrt_r4_15: + shar r4 + __ashiftrt_r4_14: + shar r4 + __ashiftrt_r4_13: + shar r4 + __ashiftrt_r4_12: + shar r4 + __ashiftrt_r4_11: + shar r4 + __ashiftrt_r4_10: + shar r4 + __ashiftrt_r4_9: + shar r4 + __ashiftrt_r4_8: + shar r4 + __ashiftrt_r4_7: + shar r4 + __ashiftrt_r4_6: + shar r4 + __ashiftrt_r4_5: + shar r4 + __ashiftrt_r4_4: + shar r4 + __ashiftrt_r4_3: + shar r4 + __ashiftrt_r4_2: + shar r4 + __ashiftrt_r4_1: + rts + shar r4 + __ashiftrt_r4_0: + rts + nop diff -Ncr linux-5.11.1/arch/sh/boot/compressed/ashldi3.c linux-5.11.1-shmin/arch/sh/boot/compressed/ashldi3.c *** linux-5.11.1/arch/sh/boot/compressed/ashldi3.c 1970-01-01 09:00:00.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/boot/compressed/ashldi3.c 2022-04-18 23:19:50.417922875 +0900 *************** *** 0 **** --- 1,30 ---- + // SPDX-License-Identifier: GPL-2.0 + #include + + #include "libgcc.h" + + long long __ashldi3(long long u, word_type b) + { + DWunion uu, w; + word_type bm; + + if (b == 0) + return u; + + uu.ll = u; + bm = 32 - b; + + if (bm <= 0) { + w.s.low = 0; + w.s.high = (unsigned int) uu.s.low << -bm; + } else { + const unsigned int carries = (unsigned int) uu.s.low >> bm; + + w.s.low = (unsigned int) uu.s.low << b; + w.s.high = ((unsigned int) uu.s.high << b) | carries; + } + + return w.ll; + } + + EXPORT_SYMBOL(__ashldi3); diff -Ncr linux-5.11.1/arch/sh/boot/compressed/ashlsi3.S linux-5.11.1-shmin/arch/sh/boot/compressed/ashlsi3.S *** linux-5.11.1/arch/sh/boot/compressed/ashlsi3.S 1970-01-01 09:00:00.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/boot/compressed/ashlsi3.S 2022-04-18 23:19:50.613920665 +0900 *************** *** 0 **** --- 1,189 ---- + /* SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0 + + Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, + 2004, 2005, 2006 + Free Software Foundation, Inc. + */ + + !! libgcc routines for the Renesas / SuperH SH CPUs. + !! Contributed by Steve Chamberlain. + !! sac@cygnus.com + + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines + !! recoded in assembly by Toshiyasu Morita + !! tm@netcom.com + + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and + ELF local label prefixes by J"orn Rennecke + amylaar@cygnus.com */ + + ! + ! __ashlsi3 + ! + ! Entry: + ! + ! r4: Value to shift + ! r5: Shifts + ! + ! Exit: + ! + ! r0: Result + ! + ! Destroys: + ! + ! (none) + ! + ! __ashlsi3_r0 + ! + ! Entry: + ! + ! r4: Value to shift + ! r0: Shifts + ! + ! Exit: + ! + ! r0: Result + ! + ! Destroys: + ! + ! (none) + + + .global __ashlsi3 + .global __ashlsi3_r0 + + .align 2 + __ashlsi3: + mov r5,r0 + .align 2 + __ashlsi3_r0: + and #31,r0 + mov.l r4,@-r15 + mov r0,r4 + mova ashlsi3_table,r0 + mov.b @(r0,r4),r4 + add r4,r0 + jmp @r0 + mov.l @r15+,r0 + + .align 2 + ashlsi3_table: + .byte ashlsi3_0-ashlsi3_table + .byte ashlsi3_1-ashlsi3_table + .byte ashlsi3_2-ashlsi3_table + .byte ashlsi3_3-ashlsi3_table + .byte ashlsi3_4-ashlsi3_table + .byte ashlsi3_5-ashlsi3_table + .byte ashlsi3_6-ashlsi3_table + .byte ashlsi3_7-ashlsi3_table + .byte ashlsi3_8-ashlsi3_table + .byte ashlsi3_9-ashlsi3_table + .byte ashlsi3_10-ashlsi3_table + .byte ashlsi3_11-ashlsi3_table + .byte ashlsi3_12-ashlsi3_table + .byte ashlsi3_13-ashlsi3_table + .byte ashlsi3_14-ashlsi3_table + .byte ashlsi3_15-ashlsi3_table + .byte ashlsi3_16-ashlsi3_table + .byte ashlsi3_17-ashlsi3_table + .byte ashlsi3_18-ashlsi3_table + .byte ashlsi3_19-ashlsi3_table + .byte ashlsi3_20-ashlsi3_table + .byte ashlsi3_21-ashlsi3_table + .byte ashlsi3_22-ashlsi3_table + .byte ashlsi3_23-ashlsi3_table + .byte ashlsi3_24-ashlsi3_table + .byte ashlsi3_25-ashlsi3_table + .byte ashlsi3_26-ashlsi3_table + .byte ashlsi3_27-ashlsi3_table + .byte ashlsi3_28-ashlsi3_table + .byte ashlsi3_29-ashlsi3_table + .byte ashlsi3_30-ashlsi3_table + .byte ashlsi3_31-ashlsi3_table + + ashlsi3_6: + shll2 r0 + ashlsi3_4: + shll2 r0 + ashlsi3_2: + rts + shll2 r0 + + ashlsi3_7: + shll2 r0 + ashlsi3_5: + shll2 r0 + ashlsi3_3: + shll2 r0 + ashlsi3_1: + rts + shll r0 + + ashlsi3_14: + shll2 r0 + ashlsi3_12: + shll2 r0 + ashlsi3_10: + shll2 r0 + ashlsi3_8: + rts + shll8 r0 + + ashlsi3_15: + shll2 r0 + ashlsi3_13: + shll2 r0 + ashlsi3_11: + shll2 r0 + ashlsi3_9: + shll8 r0 + rts + shll r0 + + ashlsi3_22: + shll2 r0 + ashlsi3_20: + shll2 r0 + ashlsi3_18: + shll2 r0 + ashlsi3_16: + rts + shll16 r0 + + ashlsi3_23: + shll2 r0 + ashlsi3_21: + shll2 r0 + ashlsi3_19: + shll2 r0 + ashlsi3_17: + shll16 r0 + rts + shll r0 + + ashlsi3_30: + shll2 r0 + ashlsi3_28: + shll2 r0 + ashlsi3_26: + shll2 r0 + ashlsi3_24: + shll16 r0 + rts + shll8 r0 + + ashlsi3_31: + shll2 r0 + ashlsi3_29: + shll2 r0 + ashlsi3_27: + shll2 r0 + ashlsi3_25: + shll16 r0 + shll8 r0 + rts + shll r0 + + ashlsi3_0: + rts + nop diff -Ncr linux-5.11.1/arch/sh/boot/compressed/ashrsi3.S linux-5.11.1-shmin/arch/sh/boot/compressed/ashrsi3.S *** linux-5.11.1/arch/sh/boot/compressed/ashrsi3.S 1970-01-01 09:00:00.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/boot/compressed/ashrsi3.S 2022-04-18 23:19:50.601920801 +0900 *************** *** 0 **** --- 1,179 ---- + /* SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0 + + Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, + 2004, 2005, 2006 + Free Software Foundation, Inc. + */ + + !! libgcc routines for the Renesas / SuperH SH CPUs. + !! Contributed by Steve Chamberlain. + !! sac@cygnus.com + + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines + !! recoded in assembly by Toshiyasu Morita + !! tm@netcom.com + + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and + ELF local label prefixes by J"orn Rennecke + amylaar@cygnus.com */ + + ! + ! __ashrsi3 + ! + ! Entry: + ! + ! r4: Value to shift + ! r5: Shifts + ! + ! Exit: + ! + ! r0: Result + ! + ! Destroys: + ! + ! (none) + ! + ! __ashrsi3_r0 + ! + ! Entry: + ! + ! r4: Value to shift + ! r0: Shifts + ! + ! Exit: + ! + ! r0: Result + ! + ! Destroys: + ! + ! (none) + + .global __ashrsi3 + .global __ashrsi3_r0 + + .align 2 + __ashrsi3: + mov r5,r0 + .align 2 + __ashrsi3_r0: + and #31,r0 + mov.l r4,@-r15 + mov r0,r4 + mova ashrsi3_table,r0 + mov.b @(r0,r4),r4 + add r4,r0 + jmp @r0 + mov.l @r15+,r0 + + .align 2 + ashrsi3_table: + .byte ashrsi3_0-ashrsi3_table + .byte ashrsi3_1-ashrsi3_table + .byte ashrsi3_2-ashrsi3_table + .byte ashrsi3_3-ashrsi3_table + .byte ashrsi3_4-ashrsi3_table + .byte ashrsi3_5-ashrsi3_table + .byte ashrsi3_6-ashrsi3_table + .byte ashrsi3_7-ashrsi3_table + .byte ashrsi3_8-ashrsi3_table + .byte ashrsi3_9-ashrsi3_table + .byte ashrsi3_10-ashrsi3_table + .byte ashrsi3_11-ashrsi3_table + .byte ashrsi3_12-ashrsi3_table + .byte ashrsi3_13-ashrsi3_table + .byte ashrsi3_14-ashrsi3_table + .byte ashrsi3_15-ashrsi3_table + .byte ashrsi3_16-ashrsi3_table + .byte ashrsi3_17-ashrsi3_table + .byte ashrsi3_18-ashrsi3_table + .byte ashrsi3_19-ashrsi3_table + .byte ashrsi3_20-ashrsi3_table + .byte ashrsi3_21-ashrsi3_table + .byte ashrsi3_22-ashrsi3_table + .byte ashrsi3_23-ashrsi3_table + .byte ashrsi3_24-ashrsi3_table + .byte ashrsi3_25-ashrsi3_table + .byte ashrsi3_26-ashrsi3_table + .byte ashrsi3_27-ashrsi3_table + .byte ashrsi3_28-ashrsi3_table + .byte ashrsi3_29-ashrsi3_table + .byte ashrsi3_30-ashrsi3_table + .byte ashrsi3_31-ashrsi3_table + + ashrsi3_31: + rotcl r0 + rts + subc r0,r0 + + ashrsi3_30: + shar r0 + ashrsi3_29: + shar r0 + ashrsi3_28: + shar r0 + ashrsi3_27: + shar r0 + ashrsi3_26: + shar r0 + ashrsi3_25: + shar r0 + ashrsi3_24: + shlr16 r0 + shlr8 r0 + rts + exts.b r0,r0 + + ashrsi3_23: + shar r0 + ashrsi3_22: + shar r0 + ashrsi3_21: + shar r0 + ashrsi3_20: + shar r0 + ashrsi3_19: + shar r0 + ashrsi3_18: + shar r0 + ashrsi3_17: + shar r0 + ashrsi3_16: + shlr16 r0 + rts + exts.w r0,r0 + + ashrsi3_15: + shar r0 + ashrsi3_14: + shar r0 + ashrsi3_13: + shar r0 + ashrsi3_12: + shar r0 + ashrsi3_11: + shar r0 + ashrsi3_10: + shar r0 + ashrsi3_9: + shar r0 + ashrsi3_8: + shar r0 + ashrsi3_7: + shar r0 + ashrsi3_6: + shar r0 + ashrsi3_5: + shar r0 + ashrsi3_4: + shar r0 + ashrsi3_3: + shar r0 + ashrsi3_2: + shar r0 + ashrsi3_1: + rts + shar r0 + + ashrsi3_0: + rts + nop diff -Ncr linux-5.11.1/arch/sh/boot/compressed/lshrsi3.S linux-5.11.1-shmin/arch/sh/boot/compressed/lshrsi3.S *** linux-5.11.1/arch/sh/boot/compressed/lshrsi3.S 1970-01-01 09:00:00.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/boot/compressed/lshrsi3.S 2022-04-18 23:19:50.621920574 +0900 *************** *** 0 **** --- 1,188 ---- + /* SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0 + + Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, + 2004, 2005, 2006 + Free Software Foundation, Inc. + */ + + !! libgcc routines for the Renesas / SuperH SH CPUs. + !! Contributed by Steve Chamberlain. + !! sac@cygnus.com + + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines + !! recoded in assembly by Toshiyasu Morita + !! tm@netcom.com + + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and + ELF local label prefixes by J"orn Rennecke + amylaar@cygnus.com */ + + ! + ! __lshrsi3 + ! + ! Entry: + ! + ! r4: Value to shift + ! r5: Shifts + ! + ! Exit: + ! + ! r0: Result + ! + ! Destroys: + ! + ! (none) + ! + ! __lshrsi3_r0 + ! + ! Entry: + ! + ! r0: Value to shift + ! r5: Shifts + ! + ! Exit: + ! + ! r0: Result + ! + ! Destroys: + ! + ! (none) + ! + .global __lshrsi3 + .global __lshrsi3_r0 + + .align 2 + __lshrsi3: + mov r5,r0 + .align 2 + __lshrsi3_r0: + and #31,r0 + mov.l r4,@-r15 + mov r0,r4 + mova lshrsi3_table,r0 + mov.b @(r0,r4),r4 + add r4,r0 + jmp @r0 + mov.l @r15+,r0 + + .align 2 + lshrsi3_table: + .byte lshrsi3_0-lshrsi3_table + .byte lshrsi3_1-lshrsi3_table + .byte lshrsi3_2-lshrsi3_table + .byte lshrsi3_3-lshrsi3_table + .byte lshrsi3_4-lshrsi3_table + .byte lshrsi3_5-lshrsi3_table + .byte lshrsi3_6-lshrsi3_table + .byte lshrsi3_7-lshrsi3_table + .byte lshrsi3_8-lshrsi3_table + .byte lshrsi3_9-lshrsi3_table + .byte lshrsi3_10-lshrsi3_table + .byte lshrsi3_11-lshrsi3_table + .byte lshrsi3_12-lshrsi3_table + .byte lshrsi3_13-lshrsi3_table + .byte lshrsi3_14-lshrsi3_table + .byte lshrsi3_15-lshrsi3_table + .byte lshrsi3_16-lshrsi3_table + .byte lshrsi3_17-lshrsi3_table + .byte lshrsi3_18-lshrsi3_table + .byte lshrsi3_19-lshrsi3_table + .byte lshrsi3_20-lshrsi3_table + .byte lshrsi3_21-lshrsi3_table + .byte lshrsi3_22-lshrsi3_table + .byte lshrsi3_23-lshrsi3_table + .byte lshrsi3_24-lshrsi3_table + .byte lshrsi3_25-lshrsi3_table + .byte lshrsi3_26-lshrsi3_table + .byte lshrsi3_27-lshrsi3_table + .byte lshrsi3_28-lshrsi3_table + .byte lshrsi3_29-lshrsi3_table + .byte lshrsi3_30-lshrsi3_table + .byte lshrsi3_31-lshrsi3_table + + lshrsi3_6: + shlr2 r0 + lshrsi3_4: + shlr2 r0 + lshrsi3_2: + rts + shlr2 r0 + + lshrsi3_7: + shlr2 r0 + lshrsi3_5: + shlr2 r0 + lshrsi3_3: + shlr2 r0 + lshrsi3_1: + rts + shlr r0 + + lshrsi3_14: + shlr2 r0 + lshrsi3_12: + shlr2 r0 + lshrsi3_10: + shlr2 r0 + lshrsi3_8: + rts + shlr8 r0 + + lshrsi3_15: + shlr2 r0 + lshrsi3_13: + shlr2 r0 + lshrsi3_11: + shlr2 r0 + lshrsi3_9: + shlr8 r0 + rts + shlr r0 + + lshrsi3_22: + shlr2 r0 + lshrsi3_20: + shlr2 r0 + lshrsi3_18: + shlr2 r0 + lshrsi3_16: + rts + shlr16 r0 + + lshrsi3_23: + shlr2 r0 + lshrsi3_21: + shlr2 r0 + lshrsi3_19: + shlr2 r0 + lshrsi3_17: + shlr16 r0 + rts + shlr r0 + + lshrsi3_30: + shlr2 r0 + lshrsi3_28: + shlr2 r0 + lshrsi3_26: + shlr2 r0 + lshrsi3_24: + shlr16 r0 + rts + shlr8 r0 + + lshrsi3_31: + shlr2 r0 + lshrsi3_29: + shlr2 r0 + lshrsi3_27: + shlr2 r0 + lshrsi3_25: + shlr16 r0 + shlr8 r0 + rts + shlr r0 + + lshrsi3_0: + rts + nop diff -Ncr linux-5.11.1/arch/sh/configs/shmin_defconfig linux-5.11.1-shmin/arch/sh/configs/shmin_defconfig *** linux-5.11.1/arch/sh/configs/shmin_defconfig 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/configs/shmin_defconfig 2022-04-18 22:53:02.690603685 +0900 *************** *** 1,51 **** ! # CONFIG_SWAP is not set CONFIG_LOG_BUF_SHIFT=14 ! # CONFIG_UID16 is not set ! # CONFIG_KALLSYMS is not set ! # CONFIG_HOTPLUG is not set # CONFIG_BUG is not set ! # CONFIG_ELF_CORE is not set # CONFIG_BASE_FULL is not set ! # CONFIG_FUTEX is not set ! # CONFIG_EPOLL is not set # CONFIG_SHMEM is not set ! CONFIG_SLOB=y ! # CONFIG_BLK_DEV_BSG is not set CONFIG_CPU_SUBTYPE_SH7706=y CONFIG_MEMORY_START=0x0c000000 ! CONFIG_MEMORY_SIZE=0x00800000 ! CONFIG_FLATMEM_MANUAL=y # CONFIG_SH_ADC is not set CONFIG_SH_SHMIN=y ! CONFIG_SH_PCLK_FREQ=32000000 ! CONFIG_CMDLINE_OVERWRITE=y ! CONFIG_CMDLINE="console=ttySC1,115200 root=1f01 mtdparts=phys_mapped_flash:64k(firm)ro,-(sys) netdev=34,0x300,eth0 " CONFIG_NET=y CONFIG_UNIX=y CONFIG_INET=y CONFIG_IP_PNP=y # CONFIG_IPV6 is not set CONFIG_MTD=y ! CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_BLOCK=y ! CONFIG_MTD_CFI=y ! CONFIG_MTD_JEDECPROBE=y ! CONFIG_MTD_CFI_AMDSTD=y ! CONFIG_MTD_PHYSMAP=y CONFIG_BLK_DEV_LOOP=y CONFIG_NETDEVICES=y ! CONFIG_NET_ETHERNET=y ! # CONFIG_INPUT is not set # CONFIG_SERIO is not set ! # CONFIG_VT is not set CONFIG_SERIAL_SH_SCI=y CONFIG_SERIAL_SH_SCI_CONSOLE=y # CONFIG_HWMON is not set # CONFIG_DNOTIFY is not set # CONFIG_SYSFS is not set ! CONFIG_CRAMFS=y ! CONFIG_NFS_FS=y ! CONFIG_NFS_V3=y ! CONFIG_ROOT_NFS=y ! CONFIG_SH_STANDARD_BIOS=y # CONFIG_CRYPTO_ANSI_CPRNG is not set --- 1,2163 ---- ! # ! # Automatically generated file; DO NOT EDIT. ! # Linux/sh 5.11.1 Kernel Configuration ! # ! CONFIG_CC_VERSION_TEXT="sh-multilib-linux-gnu-gcc (crosstool-NG 1.25.0_rc1) 6.5.0" ! CONFIG_CC_IS_GCC=y ! CONFIG_GCC_VERSION=60500 ! CONFIG_LD_VERSION=238000000 ! CONFIG_CLANG_VERSION=0 ! CONFIG_LLD_VERSION=0 ! CONFIG_CC_CAN_LINK=y ! CONFIG_CC_CAN_LINK_STATIC=y ! CONFIG_CC_HAS_ASM_GOTO=y ! CONFIG_IRQ_WORK=y ! ! # ! # General setup ! # ! CONFIG_BROKEN_ON_SMP=y ! CONFIG_INIT_ENV_ARG_LIMIT=32 ! # CONFIG_COMPILE_TEST is not set ! CONFIG_LOCALVERSION="" ! CONFIG_LOCALVERSION_AUTO=y ! CONFIG_BUILD_SALT="" ! CONFIG_HAVE_KERNEL_GZIP=y ! CONFIG_HAVE_KERNEL_BZIP2=y ! CONFIG_HAVE_KERNEL_LZMA=y ! CONFIG_HAVE_KERNEL_XZ=y ! CONFIG_HAVE_KERNEL_LZO=y ! CONFIG_KERNEL_GZIP=y ! # CONFIG_KERNEL_BZIP2 is not set ! # CONFIG_KERNEL_LZMA is not set ! # CONFIG_KERNEL_XZ is not set ! # CONFIG_KERNEL_LZO is not set ! CONFIG_DEFAULT_INIT="" ! CONFIG_DEFAULT_HOSTNAME="(none)" ! CONFIG_SWAP=y ! CONFIG_SYSVIPC=y ! CONFIG_SYSVIPC_SYSCTL=y ! CONFIG_POSIX_MQUEUE=y ! CONFIG_POSIX_MQUEUE_SYSCTL=y ! # CONFIG_WATCH_QUEUE is not set ! CONFIG_CROSS_MEMORY_ATTACH=y ! CONFIG_USELIB=y ! # CONFIG_AUDIT is not set ! CONFIG_HAVE_ARCH_AUDITSYSCALL=y ! ! # ! # IRQ subsystem ! # ! CONFIG_MAY_HAVE_SPARSE_IRQ=y ! CONFIG_GENERIC_IRQ_SHOW=y ! CONFIG_IRQ_DOMAIN=y ! CONFIG_IRQ_FORCED_THREADING=y ! CONFIG_SPARSE_IRQ=y ! # CONFIG_GENERIC_IRQ_DEBUGFS is not set ! # end of IRQ subsystem ! ! CONFIG_GENERIC_CLOCKEVENTS=y ! ! # ! # Timers subsystem ! # ! CONFIG_TICK_ONESHOT=y ! CONFIG_NO_HZ_COMMON=y ! # CONFIG_HZ_PERIODIC is not set ! CONFIG_NO_HZ_IDLE=y ! CONFIG_NO_HZ=y ! CONFIG_HIGH_RES_TIMERS=y ! # end of Timers subsystem ! ! # CONFIG_PREEMPT_NONE is not set ! # CONFIG_PREEMPT_VOLUNTARY is not set ! CONFIG_PREEMPT=y ! CONFIG_PREEMPT_COUNT=y ! CONFIG_PREEMPTION=y ! ! # ! # CPU/Task time and stats accounting ! # ! CONFIG_TICK_CPU_ACCOUNTING=y ! # CONFIG_BSD_PROCESS_ACCT is not set ! # CONFIG_TASKSTATS is not set ! # CONFIG_PSI is not set ! # end of CPU/Task time and stats accounting ! ! # ! # RCU Subsystem ! # ! CONFIG_TREE_RCU=y ! CONFIG_PREEMPT_RCU=y ! # CONFIG_RCU_EXPERT is not set ! CONFIG_SRCU=y ! CONFIG_TREE_SRCU=y ! CONFIG_TASKS_RCU_GENERIC=y ! CONFIG_TASKS_RCU=y ! CONFIG_RCU_STALL_COMMON=y ! CONFIG_RCU_NEED_SEGCBLIST=y ! # end of RCU Subsystem ! ! # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=14 ! CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 ! CONFIG_GENERIC_SCHED_CLOCK=y ! ! # ! # Scheduler features ! # ! # end of Scheduler features ! ! # CONFIG_CGROUPS is not set ! CONFIG_NAMESPACES=y ! CONFIG_UTS_NS=y ! CONFIG_IPC_NS=y ! CONFIG_USER_NS=y ! CONFIG_PID_NS=y ! CONFIG_NET_NS=y ! # CONFIG_CHECKPOINT_RESTORE is not set ! # CONFIG_SCHED_AUTOGROUP is not set ! CONFIG_RELAY=y ! CONFIG_BLK_DEV_INITRD=y ! CONFIG_INITRAMFS_SOURCE="" ! CONFIG_RD_GZIP=y ! # CONFIG_RD_BZIP2 is not set ! # CONFIG_RD_LZMA is not set ! # CONFIG_RD_XZ is not set ! # CONFIG_RD_LZO is not set ! # CONFIG_RD_LZ4 is not set ! CONFIG_RD_ZSTD=y ! # CONFIG_BOOT_CONFIG is not set ! # CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set ! CONFIG_CC_OPTIMIZE_FOR_SIZE=y ! CONFIG_SYSCTL=y ! CONFIG_HAVE_UID16=y ! CONFIG_BPF=y ! CONFIG_EXPERT=y ! CONFIG_UID16=y ! CONFIG_MULTIUSER=y ! CONFIG_SGETMASK_SYSCALL=y ! CONFIG_SYSFS_SYSCALL=y ! # CONFIG_FHANDLE is not set ! CONFIG_POSIX_TIMERS=y ! CONFIG_PRINTK=y ! CONFIG_PRINTK_NMI=y # CONFIG_BUG is not set ! CONFIG_ELF_CORE=y # CONFIG_BASE_FULL is not set ! CONFIG_FUTEX=y ! CONFIG_FUTEX_PI=y ! CONFIG_HAVE_FUTEX_CMPXCHG=y ! CONFIG_EPOLL=y ! CONFIG_SIGNALFD=y ! CONFIG_TIMERFD=y ! CONFIG_EVENTFD=y # CONFIG_SHMEM is not set ! CONFIG_AIO=y ! CONFIG_IO_URING=y ! CONFIG_ADVISE_SYSCALLS=y ! CONFIG_MEMBARRIER=y ! CONFIG_KALLSYMS=y ! # CONFIG_KALLSYMS_ALL is not set ! CONFIG_KALLSYMS_BASE_RELATIVE=y ! # CONFIG_BPF_SYSCALL is not set ! # CONFIG_USERFAULTFD is not set ! CONFIG_EMBEDDED=y ! CONFIG_HAVE_PERF_EVENTS=y ! CONFIG_PERF_USE_VMALLOC=y ! # CONFIG_PC104 is not set ! ! # ! # Kernel Performance Events And Counters ! # ! CONFIG_PERF_EVENTS=y ! # CONFIG_DEBUG_PERF_USE_VMALLOC is not set ! # end of Kernel Performance Events And Counters ! ! CONFIG_VM_EVENT_COUNTERS=y ! CONFIG_COMPAT_BRK=y ! CONFIG_SLAB=y ! # CONFIG_SLUB is not set ! # CONFIG_SLOB is not set ! CONFIG_SLAB_MERGE_DEFAULT=y ! # CONFIG_SLAB_FREELIST_RANDOM is not set ! # CONFIG_SLAB_FREELIST_HARDENED is not set ! # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set ! # CONFIG_PROFILING is not set ! # end of General setup ! ! CONFIG_SUPERH=y ! CONFIG_GENERIC_HWEIGHT=y ! CONFIG_ARCH_HIBERNATION_POSSIBLE=y ! CONFIG_STACKTRACE_SUPPORT=y ! CONFIG_LOCKDEP_SUPPORT=y ! CONFIG_DMA_NONCOHERENT=y ! CONFIG_PGTABLE_LEVELS=2 ! ! # ! # System type ! # ! CONFIG_CPU_SH3=y ! # CONFIG_CPU_SUBTYPE_SH7619 is not set ! # CONFIG_CPU_SUBTYPE_J2 is not set ! # CONFIG_CPU_SUBTYPE_SH7201 is not set ! # CONFIG_CPU_SUBTYPE_SH7203 is not set ! # CONFIG_CPU_SUBTYPE_SH7206 is not set ! # CONFIG_CPU_SUBTYPE_SH7263 is not set ! # CONFIG_CPU_SUBTYPE_SH7264 is not set ! # CONFIG_CPU_SUBTYPE_SH7269 is not set ! # CONFIG_CPU_SUBTYPE_MXG is not set ! # CONFIG_CPU_SUBTYPE_SH7705 is not set CONFIG_CPU_SUBTYPE_SH7706=y + # CONFIG_CPU_SUBTYPE_SH7707 is not set + # CONFIG_CPU_SUBTYPE_SH7708 is not set + # CONFIG_CPU_SUBTYPE_SH7709 is not set + # CONFIG_CPU_SUBTYPE_SH7710 is not set + # CONFIG_CPU_SUBTYPE_SH7712 is not set + # CONFIG_CPU_SUBTYPE_SH7720 is not set + # CONFIG_CPU_SUBTYPE_SH7721 is not set + # CONFIG_CPU_SUBTYPE_SH7750 is not set + # CONFIG_CPU_SUBTYPE_SH7091 is not set + # CONFIG_CPU_SUBTYPE_SH7750R is not set + # CONFIG_CPU_SUBTYPE_SH7750S is not set + # CONFIG_CPU_SUBTYPE_SH7751 is not set + # CONFIG_CPU_SUBTYPE_SH7751R is not set + # CONFIG_CPU_SUBTYPE_SH7760 is not set + # CONFIG_CPU_SUBTYPE_SH4_202 is not set + # CONFIG_CPU_SUBTYPE_SH7723 is not set + # CONFIG_CPU_SUBTYPE_SH7724 is not set + # CONFIG_CPU_SUBTYPE_SH7734 is not set + # CONFIG_CPU_SUBTYPE_SH7757 is not set + # CONFIG_CPU_SUBTYPE_SH7763 is not set + # CONFIG_CPU_SUBTYPE_SH7770 is not set + # CONFIG_CPU_SUBTYPE_SH7780 is not set + # CONFIG_CPU_SUBTYPE_SH7785 is not set + # CONFIG_CPU_SUBTYPE_SH7786 is not set + # CONFIG_CPU_SUBTYPE_SHX3 is not set + # CONFIG_CPU_SUBTYPE_SH7343 is not set + # CONFIG_CPU_SUBTYPE_SH7722 is not set + # CONFIG_CPU_SUBTYPE_SH7366 is not set + + # + # Memory management options + # + CONFIG_MMU=y + CONFIG_PAGE_OFFSET=0x80000000 + CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_MEMORY_START=0x0c000000 ! CONFIG_MEMORY_SIZE=0x02000000 ! CONFIG_29BIT=y ! CONFIG_VSYSCALL=y ! CONFIG_ARCH_FLATMEM_ENABLE=y ! CONFIG_ARCH_SPARSEMEM_ENABLE=y ! CONFIG_ARCH_SPARSEMEM_DEFAULT=y ! CONFIG_ARCH_SELECT_MEMORY_MODEL=y ! CONFIG_UNCACHED_MAPPING=y ! CONFIG_PAGE_SIZE_4KB=y ! # end of Memory management options ! ! # ! # Cache configuration ! # ! CONFIG_CACHE_WRITEBACK=y ! # CONFIG_CACHE_WRITETHROUGH is not set ! # CONFIG_CACHE_OFF is not set ! # end of Cache configuration ! ! # ! # Processor features ! # ! CONFIG_CPU_LITTLE_ENDIAN=y ! # CONFIG_CPU_BIG_ENDIAN is not set ! # CONFIG_SH_FPU_EMU is not set # CONFIG_SH_ADC is not set + CONFIG_CPU_HAS_INTEVT=y + CONFIG_CPU_HAS_IPR_IRQ=y + CONFIG_CPU_HAS_SR_RB=y + # end of Processor features + + # + # Board support + # + CONFIG_SH_CUSTOM_CLK=y CONFIG_SH_SHMIN=y ! # end of Board support ! ! # ! # Timer and clock configuration ! # ! CONFIG_SH_PCLK_FREQ=40000000 ! CONFIG_SH_CLK_CPG=y ! CONFIG_SH_CLK_CPG_LEGACY=y ! # end of Timer and clock configuration ! ! # ! # CPU Frequency scaling ! # ! ! # ! # CPU Frequency scaling ! # ! # CONFIG_CPU_FREQ is not set ! # end of CPU Frequency scaling ! # end of CPU Frequency scaling ! ! # ! # DMA support ! # ! # CONFIG_SH_DMA is not set ! # end of DMA support ! ! # ! # Companion Chips ! # ! # end of Companion Chips ! ! # ! # Additional SuperH Device Drivers ! # ! # CONFIG_HEARTBEAT is not set ! # CONFIG_PUSH_SWITCH is not set ! # end of Additional SuperH Device Drivers ! # end of System type ! ! # ! # Kernel features ! # ! # CONFIG_HZ_100 is not set ! # CONFIG_HZ_250 is not set ! # CONFIG_HZ_300 is not set ! CONFIG_HZ_1000=y ! CONFIG_HZ=1000 ! CONFIG_SCHED_HRTICK=y ! CONFIG_KEXEC=y ! CONFIG_CRASH_DUMP=y ! CONFIG_PHYSICAL_START=0x0c000000 ! CONFIG_GUSA=y ! # CONFIG_GUSA_RB is not set ! ! # ! # SuperH / SH-Mobile Driver Options ! # ! CONFIG_SH_INTC=y ! ! # ! # Interrupt controller options ! # ! # CONFIG_INTC_MAPPING_DEBUG is not set ! # end of SuperH / SH-Mobile Driver Options ! # end of Kernel features ! ! # ! # Boot options ! # ! CONFIG_ZERO_PAGE_OFFSET=0x00001000 ! CONFIG_BOOT_LINK_OFFSET=0x00210000 ! CONFIG_ENTRY_OFFSET=0x00001000 ! # end of Boot options ! ! # ! # Bus options ! # ! # end of Bus options ! ! # ! # Power management options (EXPERIMENTAL) ! # ! # CONFIG_HIBERNATION is not set ! # CONFIG_PM is not set ! ! # ! # CPU Idle ! # ! # CONFIG_CPU_IDLE is not set ! # end of CPU Idle ! # end of Power management options (EXPERIMENTAL) ! ! # ! # General architecture-dependent options ! # ! CONFIG_CRASH_CORE=y ! CONFIG_KEXEC_CORE=y ! CONFIG_SET_FS=y ! CONFIG_HAVE_OPROFILE=y ! # CONFIG_KPROBES is not set ! CONFIG_HAVE_IOREMAP_PROT=y ! CONFIG_HAVE_KPROBES=y ! CONFIG_HAVE_KRETPROBES=y ! CONFIG_HAVE_NMI=y ! CONFIG_HAVE_ARCH_TRACEHOOK=y ! CONFIG_GENERIC_SMP_IDLE_THREAD=y ! CONFIG_GENERIC_IDLE_POLL_SETUP=y ! CONFIG_ARCH_32BIT_OFF_T=y ! CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ! CONFIG_HAVE_HW_BREAKPOINT=y ! CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y ! CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ! CONFIG_HAVE_ARCH_SECCOMP=y ! CONFIG_HAVE_ARCH_SECCOMP_FILTER=y ! CONFIG_SECCOMP=y ! CONFIG_SECCOMP_FILTER=y ! # CONFIG_SECCOMP_CACHE_DEBUG is not set ! CONFIG_HAVE_STACKPROTECTOR=y ! CONFIG_STACKPROTECTOR=y ! CONFIG_STACKPROTECTOR_STRONG=y ! CONFIG_MODULES_USE_ELF_RELA=y ! CONFIG_OLD_SIGSUSPEND=y ! CONFIG_OLD_SIGACTION=y ! CONFIG_COMPAT_32BIT_TIME=y ! CONFIG_CPU_NO_EFFICIENT_FFS=y ! # CONFIG_LOCK_EVENT_COUNTS is not set ! ! # ! # GCOV-based kernel profiling ! # ! # CONFIG_GCOV_KERNEL is not set ! CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y ! # end of GCOV-based kernel profiling ! # end of General architecture-dependent options ! ! CONFIG_RT_MUTEXES=y ! CONFIG_BASE_SMALL=1 ! CONFIG_MODULES=y ! CONFIG_MODULE_FORCE_LOAD=y ! CONFIG_MODULE_UNLOAD=y ! CONFIG_MODULE_FORCE_UNLOAD=y ! CONFIG_MODVERSIONS=y ! # CONFIG_MODULE_SRCVERSION_ALL is not set ! # CONFIG_MODULE_SIG is not set ! # CONFIG_MODULE_COMPRESS is not set ! # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set ! # CONFIG_UNUSED_SYMBOLS is not set ! # CONFIG_TRIM_UNUSED_KSYMS is not set ! CONFIG_MODULES_TREE_LOOKUP=y ! CONFIG_BLOCK=y ! CONFIG_BLK_SCSI_REQUEST=y ! # CONFIG_BLK_DEV_BSG is not set ! # CONFIG_BLK_DEV_BSGLIB is not set ! # CONFIG_BLK_DEV_INTEGRITY is not set ! # CONFIG_BLK_DEV_ZONED is not set ! # CONFIG_BLK_CMDLINE_PARSER is not set ! # CONFIG_BLK_WBT is not set ! CONFIG_BLK_DEBUG_FS=y ! # CONFIG_BLK_SED_OPAL is not set ! # CONFIG_BLK_INLINE_ENCRYPTION is not set ! ! # ! # Partition Types ! # ! # CONFIG_PARTITION_ADVANCED is not set ! CONFIG_MSDOS_PARTITION=y ! CONFIG_EFI_PARTITION=y ! # end of Partition Types ! ! # ! # IO Schedulers ! # ! CONFIG_MQ_IOSCHED_DEADLINE=y ! CONFIG_MQ_IOSCHED_KYBER=y ! # CONFIG_IOSCHED_BFQ is not set ! # end of IO Schedulers ! ! CONFIG_UNINLINE_SPIN_UNLOCK=y ! ! # ! # Executable file formats ! # ! CONFIG_BINFMT_ELF=y ! CONFIG_ELFCORE=y ! # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set ! CONFIG_BINFMT_SCRIPT=y ! # CONFIG_BINFMT_MISC is not set ! CONFIG_COREDUMP=y ! # end of Executable file formats ! ! # ! # Memory Management options ! # ! CONFIG_SELECT_MEMORY_MODEL=y ! CONFIG_FLATMEM_MANUAL=y ! # CONFIG_SPARSEMEM_MANUAL is not set ! CONFIG_FLATMEM=y ! CONFIG_FLAT_NODE_MEM_MAP=y ! CONFIG_SPARSEMEM_STATIC=y ! CONFIG_HAVE_FAST_GUP=y ! CONFIG_SPLIT_PTLOCK_CPUS=4 ! # CONFIG_COMPACTION is not set ! # CONFIG_PAGE_REPORTING is not set ! # CONFIG_KSM is not set ! CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ! CONFIG_NEED_PER_CPU_KM=y ! # CONFIG_CLEANCACHE is not set ! # CONFIG_FRONTSWAP is not set ! # CONFIG_CMA is not set ! # CONFIG_ZPOOL is not set ! # CONFIG_ZBUD is not set ! # CONFIG_ZSMALLOC is not set ! # CONFIG_PERCPU_STATS is not set ! # CONFIG_GUP_TEST is not set ! CONFIG_ARCH_HAS_PTE_SPECIAL=y ! # end of Memory Management options ! CONFIG_NET=y + CONFIG_SKB_EXTENSIONS=y + + # + # Networking options + # + CONFIG_PACKET=y + # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y + CONFIG_UNIX_SCM=y + # CONFIG_UNIX_DIAG is not set + # CONFIG_TLS is not set + CONFIG_XFRM=y + CONFIG_XFRM_ALGO=y + # CONFIG_XFRM_USER is not set + # CONFIG_XFRM_SUB_POLICY is not set + # CONFIG_XFRM_MIGRATE is not set + # CONFIG_XFRM_STATISTICS is not set + CONFIG_XFRM_AH=y + CONFIG_XFRM_ESP=y + CONFIG_XFRM_IPCOMP=y + CONFIG_NET_KEY=y + # CONFIG_NET_KEY_MIGRATE is not set CONFIG_INET=y + CONFIG_IP_MULTICAST=y + CONFIG_IP_ADVANCED_ROUTER=y + # CONFIG_IP_FIB_TRIE_STATS is not set + CONFIG_IP_MULTIPLE_TABLES=y + CONFIG_IP_ROUTE_MULTIPATH=y + CONFIG_IP_ROUTE_VERBOSE=y + CONFIG_IP_ROUTE_CLASSID=y CONFIG_IP_PNP=y + CONFIG_IP_PNP_DHCP=y + # CONFIG_IP_PNP_BOOTP is not set + # CONFIG_IP_PNP_RARP is not set + # CONFIG_NET_IPIP is not set + # CONFIG_NET_IPGRE_DEMUX is not set + CONFIG_IP_MROUTE_COMMON=y + CONFIG_IP_MROUTE=y + # CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set + CONFIG_IP_PIMSM_V1=y + CONFIG_IP_PIMSM_V2=y + CONFIG_SYN_COOKIES=y + # CONFIG_NET_IPVTI is not set + # CONFIG_NET_FOU is not set + CONFIG_INET_AH=y + CONFIG_INET_ESP=y + # CONFIG_INET_ESP_OFFLOAD is not set + # CONFIG_INET_ESPINTCP is not set + CONFIG_INET_IPCOMP=y + CONFIG_INET_XFRM_TUNNEL=y + CONFIG_INET_TUNNEL=y + # CONFIG_INET_DIAG is not set + # CONFIG_TCP_CONG_ADVANCED is not set + CONFIG_TCP_CONG_CUBIC=y + CONFIG_DEFAULT_TCP_CONG="cubic" + # CONFIG_TCP_MD5SIG is not set # CONFIG_IPV6 is not set + # CONFIG_MPTCP is not set + # CONFIG_NETWORK_SECMARK is not set + # CONFIG_NETWORK_PHY_TIMESTAMPING is not set + # CONFIG_NETFILTER is not set + # CONFIG_BPFILTER is not set + # CONFIG_IP_DCCP is not set + # CONFIG_IP_SCTP is not set + # CONFIG_RDS is not set + # CONFIG_TIPC is not set + # CONFIG_ATM is not set + # CONFIG_L2TP is not set + # CONFIG_BRIDGE is not set + CONFIG_HAVE_NET_DSA=y + # CONFIG_NET_DSA is not set + # CONFIG_VLAN_8021Q is not set + # CONFIG_DECNET is not set + # CONFIG_LLC2 is not set + # CONFIG_ATALK is not set + # CONFIG_X25 is not set + # CONFIG_LAPB is not set + # CONFIG_PHONET is not set + # CONFIG_IEEE802154 is not set + CONFIG_NET_SCHED=y + + # + # Queueing/Scheduling + # + CONFIG_NET_SCH_CBQ=y + CONFIG_NET_SCH_HTB=y + CONFIG_NET_SCH_HFSC=y + CONFIG_NET_SCH_PRIO=y + # CONFIG_NET_SCH_MULTIQ is not set + CONFIG_NET_SCH_RED=y + # CONFIG_NET_SCH_SFB is not set + CONFIG_NET_SCH_SFQ=y + CONFIG_NET_SCH_TEQL=y + CONFIG_NET_SCH_TBF=y + # CONFIG_NET_SCH_CBS is not set + # CONFIG_NET_SCH_ETF is not set + # CONFIG_NET_SCH_TAPRIO is not set + CONFIG_NET_SCH_GRED=y + CONFIG_NET_SCH_DSMARK=y + CONFIG_NET_SCH_NETEM=y + # CONFIG_NET_SCH_DRR is not set + # CONFIG_NET_SCH_MQPRIO is not set + # CONFIG_NET_SCH_SKBPRIO is not set + # CONFIG_NET_SCH_CHOKE is not set + # CONFIG_NET_SCH_QFQ is not set + # CONFIG_NET_SCH_CODEL is not set + # CONFIG_NET_SCH_FQ_CODEL is not set + # CONFIG_NET_SCH_CAKE is not set + # CONFIG_NET_SCH_FQ is not set + # CONFIG_NET_SCH_HHF is not set + # CONFIG_NET_SCH_PIE is not set + # CONFIG_NET_SCH_PLUG is not set + # CONFIG_NET_SCH_ETS is not set + # CONFIG_NET_SCH_DEFAULT is not set + + # + # Classification + # + CONFIG_NET_CLS=y + # CONFIG_NET_CLS_BASIC is not set + CONFIG_NET_CLS_TCINDEX=y + CONFIG_NET_CLS_ROUTE4=y + CONFIG_NET_CLS_FW=y + # CONFIG_NET_CLS_U32 is not set + # CONFIG_NET_CLS_RSVP is not set + # CONFIG_NET_CLS_RSVP6 is not set + # CONFIG_NET_CLS_FLOW is not set + # CONFIG_NET_CLS_BPF is not set + # CONFIG_NET_CLS_FLOWER is not set + # CONFIG_NET_CLS_MATCHALL is not set + # CONFIG_NET_EMATCH is not set + # CONFIG_NET_CLS_ACT is not set + CONFIG_NET_SCH_FIFO=y + # CONFIG_DCB is not set + # CONFIG_DNS_RESOLVER is not set + # CONFIG_BATMAN_ADV is not set + # CONFIG_OPENVSWITCH is not set + # CONFIG_VSOCKETS is not set + # CONFIG_NETLINK_DIAG is not set + # CONFIG_MPLS is not set + # CONFIG_NET_NSH is not set + # CONFIG_HSR is not set + # CONFIG_NET_SWITCHDEV is not set + # CONFIG_NET_L3_MASTER_DEV is not set + # CONFIG_QRTR is not set + # CONFIG_NET_NCSI is not set + CONFIG_NET_RX_BUSY_POLL=y + + # + # Network testing + # + # CONFIG_NET_PKTGEN is not set + # end of Network testing + # end of Networking options + + # CONFIG_HAMRADIO is not set + # CONFIG_CAN is not set + # CONFIG_BT is not set + # CONFIG_AF_RXRPC is not set + # CONFIG_AF_KCM is not set + CONFIG_FIB_RULES=y + # CONFIG_WIRELESS is not set + # CONFIG_RFKILL is not set + # CONFIG_NET_9P is not set + # CONFIG_CAIF is not set + # CONFIG_CEPH_LIB is not set + # CONFIG_NFC is not set + # CONFIG_PSAMPLE is not set + # CONFIG_NET_IFE is not set + # CONFIG_LWTUNNEL is not set + CONFIG_GRO_CELLS=y + # CONFIG_FAILOVER is not set + CONFIG_ETHTOOL_NETLINK=y + + # + # Device Drivers + # + # CONFIG_PCCARD is not set + + # + # Generic Driver Options + # + CONFIG_UEVENT_HELPER=y + CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" + CONFIG_DEVTMPFS=y + CONFIG_DEVTMPFS_MOUNT=y + CONFIG_STANDALONE=y + CONFIG_PREVENT_FIRMWARE_BUILD=y + + # + # Firmware loader + # + CONFIG_FW_LOADER=y + CONFIG_EXTRA_FIRMWARE="" + # CONFIG_FW_LOADER_USER_HELPER is not set + # CONFIG_FW_LOADER_COMPRESS is not set + # end of Firmware loader + + CONFIG_ALLOW_DEV_COREDUMP=y + # CONFIG_DEBUG_DRIVER is not set + # CONFIG_DEBUG_DEVRES is not set + # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set + # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set + # end of Generic Driver Options + + # + # Bus devices + # + # CONFIG_MHI_BUS is not set + # end of Bus devices + + CONFIG_CONNECTOR=y + CONFIG_PROC_EVENTS=y + # CONFIG_GNSS is not set CONFIG_MTD=y ! # CONFIG_MTD_TESTS is not set ! ! # ! # Partition parsers ! # ! # CONFIG_MTD_AR7_PARTS is not set ! # CONFIG_MTD_CMDLINE_PARTS is not set ! # CONFIG_MTD_REDBOOT_PARTS is not set ! # end of Partition parsers ! ! # ! # User Modules And Translation Layers ! # ! CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y ! # CONFIG_FTL is not set ! # CONFIG_NFTL is not set ! # CONFIG_INFTL is not set ! # CONFIG_RFD_FTL is not set ! # CONFIG_SSFDC is not set ! # CONFIG_SM_FTL is not set ! # CONFIG_MTD_OOPS is not set ! # CONFIG_MTD_SWAP is not set ! # CONFIG_MTD_PARTITIONED_MASTER is not set ! ! # ! # RAM/ROM/Flash chip drivers ! # ! # CONFIG_MTD_CFI is not set ! # CONFIG_MTD_JEDECPROBE is not set ! CONFIG_MTD_MAP_BANK_WIDTH_1=y ! CONFIG_MTD_MAP_BANK_WIDTH_2=y ! CONFIG_MTD_MAP_BANK_WIDTH_4=y ! CONFIG_MTD_CFI_I1=y ! CONFIG_MTD_CFI_I2=y ! CONFIG_MTD_RAM=y ! CONFIG_MTD_ROM=y ! CONFIG_MTD_ABSENT=y ! # end of RAM/ROM/Flash chip drivers ! ! # ! # Mapping drivers for chip access ! # ! # CONFIG_MTD_COMPLEX_MAPPINGS is not set ! # CONFIG_MTD_PHYSMAP is not set ! CONFIG_MTD_PLATRAM=y ! # end of Mapping drivers for chip access ! ! # ! # Self-contained MTD device drivers ! # ! CONFIG_MTD_SLRAM=y ! CONFIG_MTD_PHRAM=y ! CONFIG_MTD_MTDRAM=y ! CONFIG_MTDRAM_TOTAL_SIZE=4096 ! CONFIG_MTDRAM_ERASE_SIZE=128 ! CONFIG_MTD_BLOCK2MTD=y ! ! # ! # Disk-On-Chip Device Drivers ! # ! # CONFIG_MTD_DOCG3 is not set ! # end of Self-contained MTD device drivers ! ! # ! # NAND ! # ! # CONFIG_MTD_ONENAND is not set ! # CONFIG_MTD_RAW_NAND is not set ! ! # ! # ECC engine support ! # ! # CONFIG_MTD_NAND_ECC_SW_HAMMING is not set ! # CONFIG_MTD_NAND_ECC_SW_BCH is not set ! # end of ECC engine support ! # end of NAND ! ! # ! # LPDDR & LPDDR2 PCM memory drivers ! # ! # CONFIG_MTD_LPDDR is not set ! # end of LPDDR & LPDDR2 PCM memory drivers ! ! # CONFIG_MTD_UBI is not set ! # CONFIG_MTD_HYPERBUS is not set ! # CONFIG_OF is not set ! CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y ! # CONFIG_PARPORT is not set ! CONFIG_BLK_DEV=y ! # CONFIG_BLK_DEV_NULL_BLK is not set CONFIG_BLK_DEV_LOOP=y + CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 + # CONFIG_BLK_DEV_CRYPTOLOOP is not set + # CONFIG_BLK_DEV_DRBD is not set + CONFIG_BLK_DEV_NBD=y + CONFIG_BLK_DEV_RAM=y + CONFIG_BLK_DEV_RAM_COUNT=16 + CONFIG_BLK_DEV_RAM_SIZE=8192 + # CONFIG_CDROM_PKTCDVD is not set + # CONFIG_ATA_OVER_ETH is not set + # CONFIG_BLK_DEV_RBD is not set + + # + # NVME Support + # + # CONFIG_NVME_FC is not set + # end of NVME Support + + # + # Misc devices + # + # CONFIG_DUMMY_IRQ is not set + # CONFIG_ENCLOSURE_SERVICES is not set + # CONFIG_SRAM is not set + # CONFIG_XILINX_SDFEC is not set + # CONFIG_C2PORT is not set + + # + # EEPROM support + # + # CONFIG_EEPROM_93CX6 is not set + # end of EEPROM support + + # + # Texas Instruments shared transport line discipline + # + # end of Texas Instruments shared transport line discipline + + # + # Altera FPGA firmware download module (requires I2C) + # + # CONFIG_ECHO is not set + # end of Misc devices + + CONFIG_HAVE_IDE=y + # CONFIG_IDE is not set + + # + # SCSI device support + # + CONFIG_SCSI_MOD=y + # CONFIG_RAID_ATTRS is not set + CONFIG_SCSI=y + CONFIG_SCSI_DMA=y + CONFIG_SCSI_PROC_FS=y + + # + # SCSI support type (disk, tape, CD-ROM) + # + CONFIG_BLK_DEV_SD=y + # CONFIG_CHR_DEV_ST is not set + # CONFIG_BLK_DEV_SR is not set + # CONFIG_CHR_DEV_SG is not set + # CONFIG_CHR_DEV_SCH is not set + # CONFIG_SCSI_CONSTANTS is not set + # CONFIG_SCSI_LOGGING is not set + CONFIG_SCSI_SCAN_ASYNC=y + + # + # SCSI Transports + # + # CONFIG_SCSI_SPI_ATTRS is not set + # CONFIG_SCSI_FC_ATTRS is not set + # CONFIG_SCSI_ISCSI_ATTRS is not set + # CONFIG_SCSI_SAS_ATTRS is not set + # CONFIG_SCSI_SAS_LIBSAS is not set + # CONFIG_SCSI_SRP_ATTRS is not set + # end of SCSI Transports + + # CONFIG_SCSI_LOWLEVEL is not set + # CONFIG_SCSI_DH is not set + # end of SCSI device support + + CONFIG_HAVE_PATA_PLATFORM=y + # CONFIG_ATA is not set + # CONFIG_MD is not set + # CONFIG_TARGET_CORE is not set CONFIG_NETDEVICES=y ! CONFIG_MII=y ! CONFIG_NET_CORE=y ! # CONFIG_BONDING is not set ! # CONFIG_DUMMY is not set ! # CONFIG_WIREGUARD is not set ! # CONFIG_EQUALIZER is not set ! # CONFIG_NET_TEAM is not set ! # CONFIG_MACVLAN is not set ! # CONFIG_IPVLAN is not set ! # CONFIG_VXLAN is not set ! # CONFIG_GENEVE is not set ! # CONFIG_BAREUDP is not set ! # CONFIG_GTP is not set ! # CONFIG_MACSEC is not set ! # CONFIG_NETCONSOLE is not set ! # CONFIG_TUN is not set ! # CONFIG_TUN_VNET_CROSS_LE is not set ! # CONFIG_VETH is not set ! # CONFIG_NLMON is not set ! ! # ! # Distributed Switch Architecture drivers ! # ! # end of Distributed Switch Architecture drivers ! ! CONFIG_ETHERNET=y ! # CONFIG_NET_VENDOR_ALACRITECH is not set ! # CONFIG_ALTERA_TSE is not set ! # CONFIG_NET_VENDOR_AMAZON is not set ! # CONFIG_NET_VENDOR_AQUANTIA is not set ! # CONFIG_NET_VENDOR_ARC is not set ! # CONFIG_NET_VENDOR_AURORA is not set ! # CONFIG_NET_VENDOR_BROADCOM is not set ! # CONFIG_NET_VENDOR_CADENCE is not set ! # CONFIG_NET_VENDOR_CAVIUM is not set ! # CONFIG_NET_VENDOR_CORTINA is not set ! # CONFIG_DNET is not set ! # CONFIG_NET_VENDOR_EZCHIP is not set ! CONFIG_NET_VENDOR_GOOGLE=y ! # CONFIG_NET_VENDOR_HUAWEI is not set ! # CONFIG_NET_VENDOR_INTEL is not set ! # CONFIG_NET_VENDOR_MARVELL is not set ! # CONFIG_NET_VENDOR_MICREL is not set ! # CONFIG_NET_VENDOR_MICROCHIP is not set ! # CONFIG_NET_VENDOR_MICROSEMI is not set ! CONFIG_NET_VENDOR_NATSEMI=y ! # CONFIG_NET_VENDOR_NETRONOME is not set ! # CONFIG_NET_VENDOR_NI is not set ! CONFIG_NET_VENDOR_8390=y ! CONFIG_AX88796B=y ! # CONFIG_AX88796 is not set ! # CONFIG_STNIC is not set ! # CONFIG_ETHOC is not set ! CONFIG_NET_VENDOR_PENSANDO=y ! # CONFIG_NET_VENDOR_QUALCOMM is not set ! CONFIG_NET_VENDOR_RENESAS=y ! CONFIG_SH_ETH=y ! # CONFIG_NET_VENDOR_ROCKER is not set ! # CONFIG_NET_VENDOR_SAMSUNG is not set ! # CONFIG_NET_VENDOR_SEEQ is not set ! # CONFIG_NET_VENDOR_SOLARFLARE is not set ! # CONFIG_NET_VENDOR_SMSC is not set ! # CONFIG_NET_VENDOR_SOCIONEXT is not set ! # CONFIG_NET_VENDOR_STMICRO is not set ! # CONFIG_NET_VENDOR_SYNOPSYS is not set ! # CONFIG_NET_VENDOR_VIA is not set ! # CONFIG_NET_VENDOR_WIZNET is not set ! CONFIG_NET_VENDOR_XILINX=y ! # CONFIG_XILINX_AXI_EMAC is not set ! # CONFIG_XILINX_LL_TEMAC is not set ! CONFIG_PHYLIB=y ! # CONFIG_FIXED_PHY is not set ! ! # ! # MII PHY device drivers ! # ! # CONFIG_AMD_PHY is not set ! # CONFIG_ADIN_PHY is not set ! # CONFIG_AQUANTIA_PHY is not set ! # CONFIG_AX88796B_PHY is not set ! # CONFIG_BROADCOM_PHY is not set ! # CONFIG_BCM54140_PHY is not set ! # CONFIG_BCM7XXX_PHY is not set ! # CONFIG_BCM84881_PHY is not set ! # CONFIG_BCM87XX_PHY is not set ! # CONFIG_CICADA_PHY is not set ! # CONFIG_CORTINA_PHY is not set ! # CONFIG_DAVICOM_PHY is not set ! # CONFIG_ICPLUS_PHY is not set ! # CONFIG_LXT_PHY is not set ! # CONFIG_INTEL_XWAY_PHY is not set ! # CONFIG_LSI_ET1011C_PHY is not set ! # CONFIG_MARVELL_PHY is not set ! # CONFIG_MARVELL_10G_PHY is not set ! # CONFIG_MICREL_PHY is not set ! # CONFIG_MICROCHIP_PHY is not set ! # CONFIG_MICROCHIP_T1_PHY is not set ! # CONFIG_MICROSEMI_PHY is not set ! # CONFIG_NATIONAL_PHY is not set ! # CONFIG_QSEMI_PHY is not set ! # CONFIG_REALTEK_PHY is not set ! # CONFIG_RENESAS_PHY is not set ! # CONFIG_ROCKCHIP_PHY is not set ! # CONFIG_SMSC_PHY is not set ! # CONFIG_STE10XP is not set ! # CONFIG_TERANETICS_PHY is not set ! # CONFIG_DP83822_PHY is not set ! # CONFIG_DP83TC811_PHY is not set ! # CONFIG_DP83848_PHY is not set ! # CONFIG_DP83867_PHY is not set ! # CONFIG_DP83869_PHY is not set ! # CONFIG_VITESSE_PHY is not set ! # CONFIG_XILINX_GMII2RGMII is not set ! CONFIG_MDIO_DEVICE=y ! CONFIG_MDIO_BUS=y ! CONFIG_MDIO_DEVRES=y ! CONFIG_MDIO_BITBANG=y ! # CONFIG_MDIO_BCM_UNIMAC is not set ! # CONFIG_MDIO_MSCC_MIIM is not set ! ! # ! # MDIO Multiplexers ! # ! ! # ! # PCS device drivers ! # ! # CONFIG_PCS_XPCS is not set ! # end of PCS device drivers ! ! # CONFIG_PPP is not set ! # CONFIG_SLIP is not set ! ! # ! # Host-side USB support is needed for USB Network Adapter support ! # ! # CONFIG_WLAN is not set ! # CONFIG_WAN is not set ! # CONFIG_NETDEVSIM is not set ! # CONFIG_NET_FAILOVER is not set ! # CONFIG_ISDN is not set ! # CONFIG_NVM is not set ! ! # ! # Input device support ! # ! CONFIG_INPUT=y ! CONFIG_INPUT_FF_MEMLESS=m ! # CONFIG_INPUT_SPARSEKMAP is not set ! # CONFIG_INPUT_MATRIXKMAP is not set ! ! # ! # Userland interfaces ! # ! CONFIG_INPUT_MOUSEDEV=y ! CONFIG_INPUT_MOUSEDEV_PSAUX=y ! CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 ! CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 ! # CONFIG_INPUT_JOYDEV is not set ! CONFIG_INPUT_EVDEV=y ! # CONFIG_INPUT_EVBUG is not set ! ! # ! # Input Device Drivers ! # ! CONFIG_INPUT_KEYBOARD=y ! # CONFIG_KEYBOARD_ATKBD is not set ! # CONFIG_KEYBOARD_LKKBD is not set ! # CONFIG_KEYBOARD_NEWTON is not set ! # CONFIG_KEYBOARD_OPENCORES is not set ! # CONFIG_KEYBOARD_SAMSUNG is not set ! # CONFIG_KEYBOARD_STOWAWAY is not set ! # CONFIG_KEYBOARD_SUNKBD is not set ! # CONFIG_KEYBOARD_XTKBD is not set ! CONFIG_INPUT_MOUSE=y ! # CONFIG_MOUSE_PS2 is not set ! # CONFIG_MOUSE_SERIAL is not set ! # CONFIG_MOUSE_VSXXXAA is not set ! # CONFIG_INPUT_JOYSTICK is not set ! # CONFIG_INPUT_TABLET is not set ! # CONFIG_INPUT_TOUCHSCREEN is not set ! # CONFIG_INPUT_MISC is not set ! # CONFIG_RMI4_CORE is not set ! ! # ! # Hardware I/O ports ! # # CONFIG_SERIO is not set ! # CONFIG_GAMEPORT is not set ! # end of Hardware I/O ports ! # end of Input device support ! ! # ! # Character devices ! # ! CONFIG_TTY=y ! CONFIG_VT=y ! CONFIG_CONSOLE_TRANSLATIONS=y ! CONFIG_VT_CONSOLE=y ! CONFIG_HW_CONSOLE=y ! # CONFIG_VT_HW_CONSOLE_BINDING is not set ! CONFIG_UNIX98_PTYS=y ! CONFIG_LEGACY_PTYS=y ! CONFIG_LEGACY_PTY_COUNT=256 ! CONFIG_LDISC_AUTOLOAD=y ! ! # ! # Serial drivers ! # ! CONFIG_SERIAL_EARLYCON=y ! CONFIG_SERIAL_8250=y ! CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y ! CONFIG_SERIAL_8250_16550A_VARIANTS=y ! # CONFIG_SERIAL_8250_FINTEK is not set ! CONFIG_SERIAL_8250_CONSOLE=y ! CONFIG_SERIAL_8250_NR_UARTS=2 ! CONFIG_SERIAL_8250_RUNTIME_UARTS=2 ! # CONFIG_SERIAL_8250_EXTENDED is not set ! # CONFIG_SERIAL_8250_DW is not set ! # CONFIG_SERIAL_8250_RT288X is not set ! ! # ! # Non-8250 serial port support ! # ! # CONFIG_SERIAL_UARTLITE is not set CONFIG_SERIAL_SH_SCI=y + CONFIG_SERIAL_SH_SCI_NR_UARTS=2 CONFIG_SERIAL_SH_SCI_CONSOLE=y + # CONFIG_SERIAL_SH_SCI_EARLYCON is not set + CONFIG_SERIAL_CORE=y + CONFIG_SERIAL_CORE_CONSOLE=y + # CONFIG_SERIAL_SCCNXP is not set + # CONFIG_SERIAL_ALTERA_JTAGUART is not set + # CONFIG_SERIAL_ALTERA_UART is not set + # CONFIG_SERIAL_ARC is not set + # CONFIG_SERIAL_FSL_LPUART is not set + # CONFIG_SERIAL_FSL_LINFLEXUART is not set + # end of Serial drivers + + # CONFIG_SERIAL_NONSTANDARD is not set + # CONFIG_N_GSM is not set + # CONFIG_NULL_TTY is not set + # CONFIG_TRACE_SINK is not set + # CONFIG_SERIAL_DEV_BUS is not set + # CONFIG_TTY_PRINTK is not set + # CONFIG_VIRTIO_CONSOLE is not set + # CONFIG_IPMI_HANDLER is not set + # CONFIG_HW_RANDOM is not set + CONFIG_DEVMEM=y + CONFIG_DEVKMEM=y + CONFIG_RAW_DRIVER=y + CONFIG_MAX_RAW_DEVS=256 + # CONFIG_TCG_TPM is not set + # end of Character devices + + # CONFIG_RANDOM_TRUST_BOOTLOADER is not set + + # + # I2C support + # + # CONFIG_I2C is not set + # end of I2C support + + # CONFIG_I3C is not set + # CONFIG_SPI is not set + # CONFIG_SPMI is not set + # CONFIG_HSI is not set + # CONFIG_PPS is not set + + # + # PTP clock support + # + # CONFIG_PTP_1588_CLOCK is not set + + # + # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. + # + # end of PTP clock support + + # CONFIG_PINCTRL is not set + CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y + # CONFIG_GPIOLIB is not set + # CONFIG_W1 is not set + # CONFIG_POWER_RESET is not set + # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set + # CONFIG_THERMAL is not set + # CONFIG_WATCHDOG is not set + CONFIG_SSB_POSSIBLE=y + # CONFIG_SSB is not set + CONFIG_BCMA_POSSIBLE=y + # CONFIG_BCMA is not set + + # + # Multifunction device drivers + # + # CONFIG_MFD_MADERA is not set + # CONFIG_HTC_PASIC3 is not set + # CONFIG_MFD_KEMPLD is not set + # CONFIG_MFD_MT6397 is not set + # CONFIG_MFD_SM501 is not set + # CONFIG_ABX500_CORE is not set + # CONFIG_MFD_SYSCON is not set + # CONFIG_MFD_TI_AM335X_TSCADC is not set + # CONFIG_MFD_TQMX86 is not set + # end of Multifunction device drivers + + # CONFIG_REGULATOR is not set + CONFIG_RC_CORE=y + CONFIG_RC_MAP=y + # CONFIG_LIRC is not set + CONFIG_RC_DECODERS=y + CONFIG_IR_NEC_DECODER=y + CONFIG_IR_RC5_DECODER=y + CONFIG_IR_RC6_DECODER=y + CONFIG_IR_JVC_DECODER=y + CONFIG_IR_SONY_DECODER=y + CONFIG_IR_SANYO_DECODER=y + CONFIG_IR_SHARP_DECODER=y + CONFIG_IR_MCE_KBD_DECODER=y + CONFIG_IR_XMP_DECODER=y + # CONFIG_IR_IMON_DECODER is not set + # CONFIG_IR_RCMM_DECODER is not set + # CONFIG_RC_DEVICES is not set + # CONFIG_MEDIA_CEC_SUPPORT is not set + # CONFIG_MEDIA_SUPPORT is not set + + # + # Graphics support + # + # CONFIG_DRM is not set + + # + # ARM devices + # + # end of ARM devices + + # + # Frame buffer Devices + # + # CONFIG_FB is not set + # end of Frame buffer Devices + + # + # Backlight & LCD device support + # + # CONFIG_LCD_CLASS_DEVICE is not set + # CONFIG_BACKLIGHT_CLASS_DEVICE is not set + # end of Backlight & LCD device support + + # + # Console display driver support + # + CONFIG_DUMMY_CONSOLE=y + CONFIG_DUMMY_CONSOLE_COLUMNS=80 + CONFIG_DUMMY_CONSOLE_ROWS=25 + # end of Console display driver support + # end of Graphics support + + # CONFIG_SOUND is not set + + # + # HID support + # + CONFIG_HID=y + # CONFIG_HID_BATTERY_STRENGTH is not set + # CONFIG_HIDRAW is not set + # CONFIG_UHID is not set + CONFIG_HID_GENERIC=y + + # + # Special HID drivers + # + # CONFIG_HID_A4TECH is not set + # CONFIG_HID_ACRUX is not set + # CONFIG_HID_APPLE is not set + # CONFIG_HID_AUREAL is not set + # CONFIG_HID_BELKIN is not set + # CONFIG_HID_CHERRY is not set + # CONFIG_HID_CHICONY is not set + # CONFIG_HID_COUGAR is not set + # CONFIG_HID_MACALLY is not set + # CONFIG_HID_CMEDIA is not set + # CONFIG_HID_CYPRESS is not set + # CONFIG_HID_DRAGONRISE is not set + # CONFIG_HID_EMS_FF is not set + # CONFIG_HID_ELECOM is not set + # CONFIG_HID_EZKEY is not set + # CONFIG_HID_GEMBIRD is not set + # CONFIG_HID_GFRM is not set + # CONFIG_HID_GLORIOUS is not set + # CONFIG_HID_VIVALDI is not set + # CONFIG_HID_KEYTOUCH is not set + # CONFIG_HID_KYE is not set + # CONFIG_HID_WALTOP is not set + # CONFIG_HID_VIEWSONIC is not set + # CONFIG_HID_GYRATION is not set + # CONFIG_HID_ICADE is not set + # CONFIG_HID_ITE is not set + # CONFIG_HID_JABRA is not set + # CONFIG_HID_TWINHAN is not set + # CONFIG_HID_KENSINGTON is not set + # CONFIG_HID_LCPOWER is not set + # CONFIG_HID_LENOVO is not set + # CONFIG_HID_MAGICMOUSE is not set + # CONFIG_HID_MALTRON is not set + # CONFIG_HID_MAYFLASH is not set + # CONFIG_HID_REDRAGON is not set + # CONFIG_HID_MICROSOFT is not set + # CONFIG_HID_MONTEREY is not set + # CONFIG_HID_MULTITOUCH is not set + # CONFIG_HID_NTI is not set + # CONFIG_HID_ORTEK is not set + # CONFIG_HID_PANTHERLORD is not set + # CONFIG_HID_PETALYNX is not set + # CONFIG_HID_PICOLCD is not set + # CONFIG_HID_PLANTRONICS is not set + # CONFIG_HID_PRIMAX is not set + # CONFIG_HID_SAITEK is not set + # CONFIG_HID_SAMSUNG is not set + # CONFIG_HID_SPEEDLINK is not set + # CONFIG_HID_STEAM is not set + # CONFIG_HID_STEELSERIES is not set + # CONFIG_HID_SUNPLUS is not set + # CONFIG_HID_RMI is not set + # CONFIG_HID_GREENASIA is not set + # CONFIG_HID_SMARTJOYPLUS is not set + # CONFIG_HID_TIVO is not set + # CONFIG_HID_TOPSEED is not set + # CONFIG_HID_THRUSTMASTER is not set + # CONFIG_HID_UDRAW_PS3 is not set + # CONFIG_HID_XINMO is not set + # CONFIG_HID_ZEROPLUS is not set + # CONFIG_HID_ZYDACRON is not set + # CONFIG_HID_SENSOR_HUB is not set + # CONFIG_HID_ALPS is not set + # end of Special HID drivers + # end of HID support + + CONFIG_USB_OHCI_LITTLE_ENDIAN=y + # CONFIG_USB_SUPPORT is not set + # CONFIG_MMC is not set + # CONFIG_MEMSTICK is not set + # CONFIG_NEW_LEDS is not set + # CONFIG_ACCESSIBILITY is not set + # CONFIG_INFINIBAND is not set + CONFIG_RTC_LIB=y + CONFIG_RTC_CLASS=y + CONFIG_RTC_HCTOSYS=y + CONFIG_RTC_HCTOSYS_DEVICE="rtc0" + CONFIG_RTC_SYSTOHC=y + CONFIG_RTC_SYSTOHC_DEVICE="rtc0" + # CONFIG_RTC_DEBUG is not set + CONFIG_RTC_NVMEM=y + + # + # RTC interfaces + # + CONFIG_RTC_INTF_PROC=y + CONFIG_RTC_INTF_DEV=y + # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set + # CONFIG_RTC_DRV_TEST is not set + + # + # I2C RTC drivers + # + + # + # SPI RTC drivers + # + + # + # SPI and I2C RTC drivers + # + + # + # Platform RTC drivers + # + # CONFIG_RTC_DRV_DS1286 is not set + # CONFIG_RTC_DRV_DS1511 is not set + # CONFIG_RTC_DRV_DS1553 is not set + # CONFIG_RTC_DRV_DS1685_FAMILY is not set + # CONFIG_RTC_DRV_DS1742 is not set + # CONFIG_RTC_DRV_DS2404 is not set + # CONFIG_RTC_DRV_STK17TA8 is not set + # CONFIG_RTC_DRV_M48T86 is not set + # CONFIG_RTC_DRV_M48T35 is not set + # CONFIG_RTC_DRV_M48T59 is not set + # CONFIG_RTC_DRV_MSM6242 is not set + # CONFIG_RTC_DRV_BQ4802 is not set + # CONFIG_RTC_DRV_RP5C01 is not set + # CONFIG_RTC_DRV_V3020 is not set + + # + # on-CPU RTC drivers + # + CONFIG_RTC_DRV_SH=y + # CONFIG_RTC_DRV_GENERIC is not set + # CONFIG_RTC_DRV_FTRTC010 is not set + + # + # HID Sensor RTC drivers + # + # CONFIG_DMADEVICES is not set + + # + # DMABUF options + # + # CONFIG_SYNC_FILE is not set + # CONFIG_DMABUF_MOVE_NOTIFY is not set + # CONFIG_DMABUF_HEAPS is not set + # end of DMABUF options + + # CONFIG_AUXDISPLAY is not set + # CONFIG_UIO is not set + # CONFIG_VIRT_DRIVERS is not set + CONFIG_VIRTIO_MENU=y + # CONFIG_VIRTIO_MMIO is not set + # CONFIG_VDPA is not set + CONFIG_VHOST_MENU=y + # CONFIG_VHOST_NET is not set + # CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + + # + # Microsoft Hyper-V guest support + # + # end of Microsoft Hyper-V guest support + + # CONFIG_STAGING is not set + # CONFIG_GOLDFISH is not set + CONFIG_HAVE_CLK=y + CONFIG_CLKDEV_LOOKUP=y + CONFIG_HAVE_LEGACY_CLK=y + # CONFIG_HWSPINLOCK is not set + + # + # Clock Source drivers + # + CONFIG_SYS_SUPPORTS_SH_TMU=y + CONFIG_SH_TIMER_TMU=y + # end of Clock Source drivers + + # CONFIG_MAILBOX is not set + CONFIG_IOMMU_SUPPORT=y + + # + # Generic IOMMU Pagetable Support + # + # end of Generic IOMMU Pagetable Support + + # CONFIG_IOMMU_DEBUGFS is not set + + # + # Remoteproc drivers + # + # CONFIG_REMOTEPROC is not set + # end of Remoteproc drivers + + # + # Rpmsg drivers + # + # CONFIG_RPMSG_VIRTIO is not set + # end of Rpmsg drivers + + # + # SOC (System On Chip) specific Drivers + # + + # + # Amlogic SoC drivers + # + # end of Amlogic SoC drivers + + # + # Broadcom SoC drivers + # + # end of Broadcom SoC drivers + + # + # NXP/Freescale QorIQ SoC drivers + # + # end of NXP/Freescale QorIQ SoC drivers + + # + # i.MX SoC drivers + # + # end of i.MX SoC drivers + + # + # Enable LiteX SoC Builder specific drivers + # + # end of Enable LiteX SoC Builder specific drivers + + # + # Qualcomm SoC drivers + # + # end of Qualcomm SoC drivers + + # CONFIG_SOC_TI is not set + + # + # Xilinx SoC drivers + # + # CONFIG_XILINX_VCU is not set + # end of Xilinx SoC drivers + # end of SOC (System On Chip) specific Drivers + + # CONFIG_PM_DEVFREQ is not set + # CONFIG_EXTCON is not set + # CONFIG_MEMORY is not set + # CONFIG_IIO is not set + # CONFIG_PWM is not set + + # + # IRQ chip support + # + # end of IRQ chip support + + # CONFIG_IPACK_BUS is not set + # CONFIG_RESET_CONTROLLER is not set + + # + # PHY Subsystem + # + # CONFIG_GENERIC_PHY is not set + # CONFIG_BCM_KONA_USB2_PHY is not set + # CONFIG_PHY_PXA_28NM_HSIC is not set + # CONFIG_PHY_PXA_28NM_USB2 is not set + # end of PHY Subsystem + + # CONFIG_POWERCAP is not set + # CONFIG_MCB is not set + + # + # Performance monitor support + # + # end of Performance monitor support + + # CONFIG_RAS is not set + + # + # Android + # + # CONFIG_ANDROID is not set + # end of Android + + # CONFIG_DAX is not set + CONFIG_NVMEM=y + + # + # HW tracing support + # + # CONFIG_STM is not set + # CONFIG_INTEL_TH is not set + # end of HW tracing support + + # CONFIG_FPGA is not set + # CONFIG_SIOX is not set + # CONFIG_SLIMBUS is not set + # CONFIG_INTERCONNECT is not set + # CONFIG_COUNTER is not set + # end of Device Drivers + + # + # File systems + # + # CONFIG_VALIDATE_FS_PARSER is not set + CONFIG_FS_IOMAP=y + CONFIG_EXT2_FS=y + CONFIG_EXT2_FS_XATTR=y + CONFIG_EXT2_FS_POSIX_ACL=y + CONFIG_EXT2_FS_SECURITY=y + CONFIG_EXT3_FS=y + CONFIG_EXT3_FS_POSIX_ACL=y + CONFIG_EXT3_FS_SECURITY=y + CONFIG_EXT4_FS=y + CONFIG_EXT4_FS_POSIX_ACL=y + CONFIG_EXT4_FS_SECURITY=y + CONFIG_EXT4_DEBUG=y + CONFIG_JBD2=y + CONFIG_JBD2_DEBUG=y + CONFIG_FS_MBCACHE=y + # CONFIG_REISERFS_FS is not set + # CONFIG_JFS_FS is not set + # CONFIG_XFS_FS is not set + # CONFIG_GFS2_FS is not set + # CONFIG_BTRFS_FS is not set + # CONFIG_NILFS2_FS is not set + # CONFIG_F2FS_FS is not set + # CONFIG_FS_DAX is not set + CONFIG_FS_POSIX_ACL=y + # CONFIG_EXPORTFS_BLOCK_OPS is not set + CONFIG_FILE_LOCKING=y + CONFIG_MANDATORY_FILE_LOCKING=y + CONFIG_FS_ENCRYPTION=y + CONFIG_FS_ENCRYPTION_ALGS=y + # CONFIG_FS_VERITY is not set + CONFIG_FSNOTIFY=y # CONFIG_DNOTIFY is not set + CONFIG_INOTIFY_USER=y + # CONFIG_FANOTIFY is not set + # CONFIG_QUOTA is not set + # CONFIG_AUTOFS4_FS is not set + # CONFIG_AUTOFS_FS is not set + # CONFIG_FUSE_FS is not set + # CONFIG_OVERLAY_FS is not set + + # + # Caches + # + # CONFIG_FSCACHE is not set + # end of Caches + + # + # CD-ROM/DVD Filesystems + # + # CONFIG_ISO9660_FS is not set + # CONFIG_UDF_FS is not set + # end of CD-ROM/DVD Filesystems + + # + # DOS/FAT/EXFAT/NT Filesystems + # + CONFIG_FAT_FS=y + CONFIG_MSDOS_FS=y + CONFIG_VFAT_FS=y + CONFIG_FAT_DEFAULT_CODEPAGE=437 + CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" + # CONFIG_FAT_DEFAULT_UTF8 is not set + # CONFIG_EXFAT_FS is not set + # CONFIG_NTFS_FS is not set + # end of DOS/FAT/EXFAT/NT Filesystems + + # + # Pseudo filesystems + # + CONFIG_PROC_FS=y + CONFIG_PROC_KCORE=y + CONFIG_PROC_VMCORE=y + # CONFIG_PROC_VMCORE_DEVICE_DUMP is not set + CONFIG_PROC_SYSCTL=y + CONFIG_PROC_PAGE_MONITOR=y + # CONFIG_PROC_CHILDREN is not set # CONFIG_SYSFS is not set ! CONFIG_ARCH_HAS_GIGANTIC_PAGE=y ! # CONFIG_CONFIGFS_FS is not set ! # end of Pseudo filesystems ! ! # CONFIG_MISC_FILESYSTEMS is not set ! # CONFIG_NETWORK_FILESYSTEMS is not set ! CONFIG_NLS=y ! CONFIG_NLS_DEFAULT="iso8859-1" ! CONFIG_NLS_CODEPAGE_437=y ! # CONFIG_NLS_CODEPAGE_737 is not set ! # CONFIG_NLS_CODEPAGE_775 is not set ! # CONFIG_NLS_CODEPAGE_850 is not set ! # CONFIG_NLS_CODEPAGE_852 is not set ! # CONFIG_NLS_CODEPAGE_855 is not set ! # CONFIG_NLS_CODEPAGE_857 is not set ! # CONFIG_NLS_CODEPAGE_860 is not set ! # CONFIG_NLS_CODEPAGE_861 is not set ! # CONFIG_NLS_CODEPAGE_862 is not set ! # CONFIG_NLS_CODEPAGE_863 is not set ! # CONFIG_NLS_CODEPAGE_864 is not set ! # CONFIG_NLS_CODEPAGE_865 is not set ! # CONFIG_NLS_CODEPAGE_866 is not set ! # CONFIG_NLS_CODEPAGE_869 is not set ! # CONFIG_NLS_CODEPAGE_936 is not set ! # CONFIG_NLS_CODEPAGE_950 is not set ! CONFIG_NLS_CODEPAGE_932=y ! # CONFIG_NLS_CODEPAGE_949 is not set ! # CONFIG_NLS_CODEPAGE_874 is not set ! # CONFIG_NLS_ISO8859_8 is not set ! # CONFIG_NLS_CODEPAGE_1250 is not set ! # CONFIG_NLS_CODEPAGE_1251 is not set ! # CONFIG_NLS_ASCII is not set ! CONFIG_NLS_ISO8859_1=y ! # CONFIG_NLS_ISO8859_2 is not set ! # CONFIG_NLS_ISO8859_3 is not set ! # CONFIG_NLS_ISO8859_4 is not set ! # CONFIG_NLS_ISO8859_5 is not set ! # CONFIG_NLS_ISO8859_6 is not set ! # CONFIG_NLS_ISO8859_7 is not set ! # CONFIG_NLS_ISO8859_9 is not set ! # CONFIG_NLS_ISO8859_13 is not set ! # CONFIG_NLS_ISO8859_14 is not set ! # CONFIG_NLS_ISO8859_15 is not set ! # CONFIG_NLS_KOI8_R is not set ! # CONFIG_NLS_KOI8_U is not set ! # CONFIG_NLS_MAC_ROMAN is not set ! # CONFIG_NLS_MAC_CELTIC is not set ! # CONFIG_NLS_MAC_CENTEURO is not set ! # CONFIG_NLS_MAC_CROATIAN is not set ! # CONFIG_NLS_MAC_CYRILLIC is not set ! # CONFIG_NLS_MAC_GAELIC is not set ! # CONFIG_NLS_MAC_GREEK is not set ! # CONFIG_NLS_MAC_ICELAND is not set ! # CONFIG_NLS_MAC_INUIT is not set ! # CONFIG_NLS_MAC_ROMANIAN is not set ! # CONFIG_NLS_MAC_TURKISH is not set ! # CONFIG_NLS_UTF8 is not set ! # CONFIG_UNICODE is not set ! CONFIG_IO_WQ=y ! # end of File systems ! ! # ! # Security options ! # ! CONFIG_KEYS=y ! # CONFIG_KEYS_REQUEST_CACHE is not set ! # CONFIG_PERSISTENT_KEYRINGS is not set ! # CONFIG_ENCRYPTED_KEYS is not set ! # CONFIG_KEY_DH_OPERATIONS is not set ! # CONFIG_SECURITY_DMESG_RESTRICT is not set ! # CONFIG_SECURITYFS is not set ! CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y ! # CONFIG_HARDENED_USERCOPY is not set ! # CONFIG_STATIC_USERMODEHELPER is not set ! CONFIG_DEFAULT_SECURITY_DAC=y ! CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity" ! ! # ! # Kernel hardening options ! # ! ! # ! # Memory initialization ! # ! CONFIG_INIT_STACK_NONE=y ! # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set ! # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set ! # end of Memory initialization ! # end of Kernel hardening options ! # end of Security options ! ! CONFIG_CRYPTO=y ! ! # ! # Crypto core or helper ! # ! CONFIG_CRYPTO_ALGAPI=y ! CONFIG_CRYPTO_ALGAPI2=y ! CONFIG_CRYPTO_AEAD=y ! CONFIG_CRYPTO_AEAD2=y ! CONFIG_CRYPTO_SKCIPHER=y ! CONFIG_CRYPTO_SKCIPHER2=y ! CONFIG_CRYPTO_HASH=y ! CONFIG_CRYPTO_HASH2=y ! CONFIG_CRYPTO_RNG=y ! CONFIG_CRYPTO_RNG2=y ! CONFIG_CRYPTO_RNG_DEFAULT=y ! CONFIG_CRYPTO_AKCIPHER2=y ! CONFIG_CRYPTO_KPP2=y ! CONFIG_CRYPTO_ACOMP2=y ! CONFIG_CRYPTO_MANAGER=y ! CONFIG_CRYPTO_MANAGER2=y ! # CONFIG_CRYPTO_USER is not set ! CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y ! CONFIG_CRYPTO_GF128MUL=y ! CONFIG_CRYPTO_NULL=y ! CONFIG_CRYPTO_NULL2=y ! # CONFIG_CRYPTO_CRYPTD is not set ! CONFIG_CRYPTO_AUTHENC=y ! # CONFIG_CRYPTO_TEST is not set ! ! # ! # Public-key cryptography ! # ! # CONFIG_CRYPTO_RSA is not set ! # CONFIG_CRYPTO_DH is not set ! # CONFIG_CRYPTO_ECDH is not set ! # CONFIG_CRYPTO_ECRDSA is not set ! # CONFIG_CRYPTO_SM2 is not set ! # CONFIG_CRYPTO_CURVE25519 is not set ! ! # ! # Authenticated Encryption with Associated Data ! # ! # CONFIG_CRYPTO_CCM is not set ! CONFIG_CRYPTO_GCM=y ! # CONFIG_CRYPTO_CHACHA20POLY1305 is not set ! # CONFIG_CRYPTO_AEGIS128 is not set ! CONFIG_CRYPTO_SEQIV=y ! CONFIG_CRYPTO_ECHAINIV=y ! ! # ! # Block modes ! # ! CONFIG_CRYPTO_CBC=y ! # CONFIG_CRYPTO_CFB is not set ! CONFIG_CRYPTO_CTR=y ! CONFIG_CRYPTO_CTS=y ! CONFIG_CRYPTO_ECB=y ! # CONFIG_CRYPTO_LRW is not set ! # CONFIG_CRYPTO_OFB is not set ! # CONFIG_CRYPTO_PCBC is not set ! CONFIG_CRYPTO_XTS=y ! # CONFIG_CRYPTO_KEYWRAP is not set ! # CONFIG_CRYPTO_ADIANTUM is not set ! # CONFIG_CRYPTO_ESSIV is not set ! ! # ! # Hash modes ! # ! # CONFIG_CRYPTO_CMAC is not set ! CONFIG_CRYPTO_HMAC=y ! # CONFIG_CRYPTO_XCBC is not set ! # CONFIG_CRYPTO_VMAC is not set ! ! # ! # Digest ! # ! CONFIG_CRYPTO_CRC32C=y ! # CONFIG_CRYPTO_CRC32 is not set ! # CONFIG_CRYPTO_XXHASH is not set ! # CONFIG_CRYPTO_BLAKE2B is not set ! # CONFIG_CRYPTO_BLAKE2S is not set ! # CONFIG_CRYPTO_CRCT10DIF is not set ! CONFIG_CRYPTO_GHASH=y ! # CONFIG_CRYPTO_POLY1305 is not set ! # CONFIG_CRYPTO_MD4 is not set ! CONFIG_CRYPTO_MD5=y ! # CONFIG_CRYPTO_MICHAEL_MIC is not set ! # CONFIG_CRYPTO_RMD128 is not set ! # CONFIG_CRYPTO_RMD160 is not set ! # CONFIG_CRYPTO_RMD256 is not set ! # CONFIG_CRYPTO_RMD320 is not set ! CONFIG_CRYPTO_SHA1=y ! CONFIG_CRYPTO_SHA256=y ! CONFIG_CRYPTO_SHA512=y ! # CONFIG_CRYPTO_SHA3 is not set ! # CONFIG_CRYPTO_SM3 is not set ! # CONFIG_CRYPTO_STREEBOG is not set ! # CONFIG_CRYPTO_TGR192 is not set ! # CONFIG_CRYPTO_WP512 is not set ! ! # ! # Ciphers ! # ! CONFIG_CRYPTO_AES=y ! # CONFIG_CRYPTO_AES_TI is not set ! # CONFIG_CRYPTO_BLOWFISH is not set ! # CONFIG_CRYPTO_CAMELLIA is not set ! # CONFIG_CRYPTO_CAST5 is not set ! # CONFIG_CRYPTO_CAST6 is not set ! CONFIG_CRYPTO_DES=y ! # CONFIG_CRYPTO_FCRYPT is not set ! # CONFIG_CRYPTO_SALSA20 is not set ! # CONFIG_CRYPTO_CHACHA20 is not set ! # CONFIG_CRYPTO_SERPENT is not set ! # CONFIG_CRYPTO_SM4 is not set ! # CONFIG_CRYPTO_TWOFISH is not set ! ! # ! # Compression ! # ! CONFIG_CRYPTO_DEFLATE=y ! # CONFIG_CRYPTO_LZO is not set ! # CONFIG_CRYPTO_842 is not set ! # CONFIG_CRYPTO_LZ4 is not set ! # CONFIG_CRYPTO_LZ4HC is not set ! # CONFIG_CRYPTO_ZSTD is not set ! ! # ! # Random Number Generation ! # # CONFIG_CRYPTO_ANSI_CPRNG is not set + CONFIG_CRYPTO_DRBG_MENU=y + CONFIG_CRYPTO_DRBG_HMAC=y + # CONFIG_CRYPTO_DRBG_HASH is not set + # CONFIG_CRYPTO_DRBG_CTR is not set + CONFIG_CRYPTO_DRBG=y + CONFIG_CRYPTO_JITTERENTROPY=y + # CONFIG_CRYPTO_USER_API_HASH is not set + # CONFIG_CRYPTO_USER_API_SKCIPHER is not set + # CONFIG_CRYPTO_USER_API_RNG is not set + # CONFIG_CRYPTO_USER_API_AEAD is not set + + # + # Crypto library routines + # + CONFIG_CRYPTO_LIB_AES=y + # CONFIG_CRYPTO_LIB_BLAKE2S is not set + # CONFIG_CRYPTO_LIB_CHACHA is not set + # CONFIG_CRYPTO_LIB_CURVE25519 is not set + CONFIG_CRYPTO_LIB_DES=y + CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 + # CONFIG_CRYPTO_LIB_POLY1305 is not set + # CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set + CONFIG_CRYPTO_LIB_SHA256=y + CONFIG_CRYPTO_HW=y + # CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set + # CONFIG_ASYMMETRIC_KEY_TYPE is not set + + # + # Certificates for signature checking + # + # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set + # end of Certificates for signature checking + + # + # Library routines + # + # CONFIG_PACKING is not set + CONFIG_BITREVERSE=y + CONFIG_GENERIC_STRNCPY_FROM_USER=y + CONFIG_GENERIC_STRNLEN_USER=y + CONFIG_GENERIC_NET_UTILS=y + # CONFIG_CORDIC is not set + # CONFIG_PRIME_NUMBERS is not set + CONFIG_CRC_CCITT=y + CONFIG_CRC16=y + # CONFIG_CRC_T10DIF is not set + # CONFIG_CRC_ITU_T is not set + CONFIG_CRC32=y + # CONFIG_CRC32_SELFTEST is not set + CONFIG_CRC32_SLICEBY8=y + # CONFIG_CRC32_SLICEBY4 is not set + # CONFIG_CRC32_SARWATE is not set + # CONFIG_CRC32_BIT is not set + # CONFIG_CRC64 is not set + # CONFIG_CRC4 is not set + # CONFIG_CRC7 is not set + # CONFIG_LIBCRC32C is not set + # CONFIG_CRC8 is not set + CONFIG_XXHASH=y + # CONFIG_RANDOM32_SELFTEST is not set + CONFIG_ZLIB_INFLATE=y + CONFIG_ZLIB_DEFLATE=y + CONFIG_ZSTD_DECOMPRESS=y + # CONFIG_XZ_DEC is not set + CONFIG_DECOMPRESS_GZIP=y + CONFIG_DECOMPRESS_ZSTD=y + CONFIG_GENERIC_ALLOCATOR=y + CONFIG_ASSOCIATIVE_ARRAY=y + CONFIG_HAS_IOMEM=y + CONFIG_HAS_IOPORT_MAP=y + CONFIG_HAS_DMA=y + CONFIG_NEED_SG_DMA_LENGTH=y + CONFIG_DMA_DECLARE_COHERENT=y + CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y + CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y + CONFIG_DMA_NONCOHERENT_MMAP=y + CONFIG_DMA_COHERENT_POOL=y + CONFIG_DMA_REMAP=y + CONFIG_DMA_DIRECT_REMAP=y + # CONFIG_DMA_API_DEBUG is not set + # CONFIG_DMA_MAP_BENCHMARK is not set + CONFIG_SGL_ALLOC=y + CONFIG_NLATTR=y + CONFIG_GENERIC_ATOMIC64=y + # CONFIG_IRQ_POLL is not set + CONFIG_SG_POOL=y + CONFIG_SBITMAP=y + # CONFIG_STRING_SELFTEST is not set + # end of Library routines + + # + # Kernel hacking + # + + # + # printk and dmesg options + # + # CONFIG_PRINTK_TIME is not set + # CONFIG_PRINTK_CALLER is not set + CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 + CONFIG_CONSOLE_LOGLEVEL_QUIET=4 + CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 + # CONFIG_DYNAMIC_DEBUG is not set + # CONFIG_DYNAMIC_DEBUG_CORE is not set + CONFIG_SYMBOLIC_ERRNAME=y + # end of printk and dmesg options + + # + # Compile-time checks and compiler options + # + # CONFIG_DEBUG_INFO is not set + CONFIG_FRAME_WARN=1024 + # CONFIG_STRIP_ASM_SYMS is not set + # CONFIG_READABLE_ASM is not set + # CONFIG_HEADERS_INSTALL is not set + # CONFIG_DEBUG_SECTION_MISMATCH is not set + CONFIG_SECTION_MISMATCH_WARN_ONLY=y + # CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set + # CONFIG_FRAME_POINTER is not set + # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set + # end of Compile-time checks and compiler options + + # + # Generic Kernel Debugging Instruments + # + # CONFIG_MAGIC_SYSRQ is not set + CONFIG_DEBUG_FS=y + CONFIG_DEBUG_FS_ALLOW_ALL=y + # CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set + # CONFIG_DEBUG_FS_ALLOW_NONE is not set + CONFIG_HAVE_ARCH_KGDB=y + # CONFIG_KGDB is not set + # CONFIG_UBSAN is not set + # end of Generic Kernel Debugging Instruments + + CONFIG_DEBUG_KERNEL=y + CONFIG_DEBUG_MISC=y + + # + # Memory Debugging + # + # CONFIG_PAGE_EXTENSION is not set + # CONFIG_DEBUG_PAGEALLOC is not set + # CONFIG_PAGE_OWNER is not set + # CONFIG_PAGE_POISONING is not set + # CONFIG_DEBUG_OBJECTS is not set + # CONFIG_DEBUG_SLAB is not set + CONFIG_HAVE_DEBUG_KMEMLEAK=y + # CONFIG_DEBUG_KMEMLEAK is not set + # CONFIG_DEBUG_STACK_USAGE is not set + # CONFIG_SCHED_STACK_END_CHECK is not set + # CONFIG_DEBUG_VM is not set + # CONFIG_DEBUG_MEMORY_INIT is not set + CONFIG_CC_HAS_KASAN_GENERIC=y + # end of Memory Debugging + + # CONFIG_DEBUG_SHIRQ is not set + + # + # Debug Oops, Lockups and Hangs + # + # CONFIG_PANIC_ON_OOPS is not set + CONFIG_PANIC_ON_OOPS_VALUE=0 + CONFIG_PANIC_TIMEOUT=0 + # CONFIG_SOFTLOCKUP_DETECTOR is not set + # CONFIG_DETECT_HUNG_TASK is not set + # CONFIG_WQ_WATCHDOG is not set + # CONFIG_TEST_LOCKUP is not set + # end of Debug Oops, Lockups and Hangs + + # + # Scheduler Debugging + # + CONFIG_SCHED_DEBUG=y + # CONFIG_SCHEDSTATS is not set + # end of Scheduler Debugging + + # CONFIG_DEBUG_TIMEKEEPING is not set + CONFIG_DEBUG_PREEMPT=y + + # + # Lock Debugging (spinlocks, mutexes, etc...) + # + CONFIG_LOCK_DEBUGGING_SUPPORT=y + # CONFIG_PROVE_LOCKING is not set + # CONFIG_LOCK_STAT is not set + # CONFIG_DEBUG_RT_MUTEXES is not set + # CONFIG_DEBUG_SPINLOCK is not set + # CONFIG_DEBUG_MUTEXES is not set + # CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set + # CONFIG_DEBUG_RWSEMS is not set + # CONFIG_DEBUG_LOCK_ALLOC is not set + # CONFIG_DEBUG_ATOMIC_SLEEP is not set + # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set + # CONFIG_LOCK_TORTURE_TEST is not set + # CONFIG_WW_MUTEX_SELFTEST is not set + # CONFIG_SCF_TORTURE_TEST is not set + # end of Lock Debugging (spinlocks, mutexes, etc...) + + # CONFIG_STACKTRACE is not set + # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set + # CONFIG_DEBUG_KOBJECT is not set + CONFIG_HAVE_DEBUG_BUGVERBOSE=y + + # + # Debug kernel data structures + # + # CONFIG_DEBUG_LIST is not set + # CONFIG_DEBUG_PLIST is not set + # CONFIG_DEBUG_SG is not set + # CONFIG_DEBUG_NOTIFIERS is not set + # CONFIG_BUG_ON_DATA_CORRUPTION is not set + # end of Debug kernel data structures + + # CONFIG_DEBUG_CREDENTIALS is not set + + # + # RCU Debugging + # + # CONFIG_RCU_SCALE_TEST is not set + # CONFIG_RCU_TORTURE_TEST is not set + # CONFIG_RCU_REF_SCALE_TEST is not set + CONFIG_RCU_CPU_STALL_TIMEOUT=60 + # CONFIG_RCU_TRACE is not set + # CONFIG_RCU_EQS_DEBUG is not set + # end of RCU Debugging + + # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set + # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set + # CONFIG_LATENCYTOP is not set + CONFIG_HAVE_FUNCTION_TRACER=y + CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y + CONFIG_HAVE_DYNAMIC_FTRACE=y + CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y + CONFIG_HAVE_SYSCALL_TRACEPOINTS=y + CONFIG_TRACING_SUPPORT=y + # CONFIG_FTRACE is not set + # CONFIG_SAMPLES is not set + + # + # sh Debugging + # + CONFIG_TRACE_IRQFLAGS_SUPPORT=y + # CONFIG_SH_STANDARD_BIOS is not set + # CONFIG_STACK_DEBUG is not set + # CONFIG_4KSTACKS is not set + # CONFIG_DUMP_CODE is not set + # CONFIG_DWARF_UNWINDER is not set + # CONFIG_SH_NO_BSS_INIT is not set + # end of sh Debugging + + # + # Kernel Testing and Coverage + # + # CONFIG_KUNIT is not set + # CONFIG_NOTIFIER_ERROR_INJECTION is not set + # CONFIG_FAULT_INJECTION is not set + CONFIG_CC_HAS_SANCOV_TRACE_PC=y + CONFIG_RUNTIME_TESTING_MENU=y + # CONFIG_LKDTM is not set + # CONFIG_TEST_LIST_SORT is not set + # CONFIG_TEST_MIN_HEAP is not set + # CONFIG_TEST_SORT is not set + # CONFIG_BACKTRACE_SELF_TEST is not set + # CONFIG_RBTREE_TEST is not set + # CONFIG_REED_SOLOMON_TEST is not set + # CONFIG_INTERVAL_TREE_TEST is not set + # CONFIG_PERCPU_TEST is not set + # CONFIG_ATOMIC64_SELFTEST is not set + # CONFIG_TEST_HEXDUMP is not set + # CONFIG_TEST_STRING_HELPERS is not set + # CONFIG_TEST_STRSCPY is not set + # CONFIG_TEST_KSTRTOX is not set + # CONFIG_TEST_PRINTF is not set + # CONFIG_TEST_BITMAP is not set + # CONFIG_TEST_UUID is not set + # CONFIG_TEST_XARRAY is not set + # CONFIG_TEST_OVERFLOW is not set + # CONFIG_TEST_RHASHTABLE is not set + # CONFIG_TEST_HASH is not set + # CONFIG_TEST_IDA is not set + # CONFIG_TEST_LKM is not set + # CONFIG_TEST_BITOPS is not set + # CONFIG_TEST_VMALLOC is not set + # CONFIG_TEST_USER_COPY is not set + # CONFIG_TEST_BPF is not set + # CONFIG_TEST_BLACKHOLE_DEV is not set + # CONFIG_FIND_BIT_BENCHMARK is not set + # CONFIG_TEST_FIRMWARE is not set + # CONFIG_TEST_SYSCTL is not set + # CONFIG_TEST_UDELAY is not set + # CONFIG_TEST_STATIC_KEYS is not set + # CONFIG_TEST_KMOD is not set + # CONFIG_TEST_MEMCAT_P is not set + # CONFIG_TEST_STACKINIT is not set + # CONFIG_TEST_MEMINIT is not set + # CONFIG_TEST_FREE_PAGES is not set + # CONFIG_MEMTEST is not set + # end of Kernel Testing and Coverage + # end of Kernel hacking diff -Ncr linux-5.11.1/arch/sh/drivers/Makefile linux-5.11.1-shmin/arch/sh/drivers/Makefile *** linux-5.11.1/arch/sh/drivers/Makefile 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/drivers/Makefile 2022-04-18 22:35:23.255125773 +0900 *************** *** 9,11 **** --- 9,13 ---- obj-$(CONFIG_SUPERHYWAY) += superhyway/ obj-$(CONFIG_PUSH_SWITCH) += push-switch.o obj-$(CONFIG_HEARTBEAT) += heartbeat.o + obj-$(CONFIG_SH_SHMIN) += mmc/ + diff -Ncr linux-5.11.1/arch/sh/drivers/mmc/Makefile linux-5.11.1-shmin/arch/sh/drivers/mmc/Makefile *** linux-5.11.1/arch/sh/drivers/mmc/Makefile 1970-01-01 09:00:00.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/drivers/mmc/Makefile 2022-04-18 22:35:23.255125773 +0900 *************** *** 0 **** --- 1,6 ---- + # + # Makefile for the SuperH MMC specific kernel interface routines under Linux. + # + + obj-$(CONFIG_SH_SHMIN) += sh_mmc.o + diff -Ncr linux-5.11.1/arch/sh/drivers/mmc/sh_mmc.c linux-5.11.1-shmin/arch/sh/drivers/mmc/sh_mmc.c *** linux-5.11.1/arch/sh/drivers/mmc/sh_mmc.c 1970-01-01 09:00:00.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/drivers/mmc/sh_mmc.c 2022-04-18 23:19:13.598354895 +0900 *************** *** 0 **** --- 1,768 ---- + #define DEVICE_NAME "shmmc" + + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include "sh_mmc.h" + + #define MMC_BLKSIZ 512 + #define SECTOR_SHIFT 9 + #define MMC_MINOR_COUNT 1 + #define SUCCESS 0 + + #define SH7706LANV1 0 + #define SH7706LANV2 1 + + static DEFINE_MUTEX(shmmc_mutex); + static u_long shmmc_size = 0; + static int current_device = -1; + static char board_id; + static sector_t disksize; + static volatile unsigned char *spidr, *spibr, *spisr; + static unsigned char sdhc; + static int mmc_major; + + static DEFINE_SPINLOCK(shmmc_lock); + static struct gendisk *shmmc_gendisk; + + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + + static void sci_putch(int c) { + int w; + + w = (__raw_readw(SCPCR) & ~SCPCR_CLK_MASK) | SCPCR_CLK_OUT; __raw_writew(w, SCPCR); + __raw_writeb(SCI_TE + SCK_OUT, SCR0); + while((__raw_readb(SSR0) & SCI_TDRE) == 0); + w = __raw_readw(SCPCR) & ~SCPCR_CLK_MASK; __raw_writew(w, SCPCR); + __raw_writeb(c, TDR0); + w = __raw_readb(SSR0); + __raw_writeb(0, SSR0); + } + + static void sci_putch_sw(void) { + int w; + + while(!(__raw_readb(SSR0) & SCI_TEND)); + + w = __raw_readw(SCPCR) | SCPCR_CLK_IN; __raw_writew(w, SCPCR); + w = __raw_readb(SCR0) | SCK_IN; __raw_writeb(w, SCR0); + w = __raw_readw(SCPCR) & ~SCPCR_CLK_MASK; __raw_writew(w, SCPCR); + __raw_writeb(0, SMR0); + __raw_writeb(SCK_OUT, SCR0); + __raw_writeb(0, SSR0); + __raw_writeb(SCI_CA, SMR0); + } + + static int sci_getch(void) { + int w, c; + + #if defined(CONFIG_CPU_SH2) + w = (__raw_readw(SCPCR) & ~SCPCR_CLK_MASK) | SCPCR_CLK_OUT; __raw_writew(w, SCPCR); + #endif + __raw_writeb(SCI_RE + SCK_OUT, SCR0); + if(__raw_readb(SSR0) & SCI_ORER) { + w = __raw_readb(SSR0) & ~SCI_ORER; __raw_writeb(w, SSR0); + return -1; + } + w = __raw_readw(SCPCR) & ~SCPCR_CLK_MASK; __raw_writew(w, SCPCR); + while((__raw_readb(SSR0) & SCI_RDRF) == 0); + c = __raw_readb(RDR0); + w = __raw_readb(SSR0); + __raw_writeb(0, SSR0); + return c & 0xff; + } + static void sci_getch_sw(void) { + unsigned short w; + + __raw_writeb(LOW_SPD, BRR0); + while(!(__raw_readb(SSR0) & SCI_RDRF)); + w = __raw_readb(RDR0); + w = __raw_readw(SCPCR) | SCPCR_CLK_IN; __raw_writew(w, SCPCR); + w = __raw_readb(SCR0) | SCK_IN; __raw_writeb(w, SCR0); + w = __raw_readw(SCPCR) & ~SCPCR_CLK_MASK; __raw_writew(w, SCPCR); + __raw_writeb(0, SMR0); + __raw_writeb(SCK_OUT, SCR0); + __raw_writeb(0, SSR0); + __raw_writeb(SCI_CA, SMR0); + } + + static int mmc_command(char command, char *arg, int arglen) { + int datalen, over; + unsigned char data; + + __raw_writeb((command == 0) ? LOW_SPD : MID_SPD, BRR0); + sci_putch(0xff); + sci_putch(MMC_CMD_INIT | (command & 0x3f)); + datalen = arglen; + while(datalen) { + sci_putch(arg[arglen - datalen]); + datalen--; + } + datalen = 4 - arglen; + while(datalen){ + sci_putch(0x00); + datalen--; + } + sci_putch((command == 0) ? 0x95 : 0); + sci_putch(0xff); + sci_putch_sw(); + over = MMC_TIME_OVER; + while((data = sci_getch()) & 0x80){ + if(--over == 0) return -1; + } + sci_getch_sw(); + return data; + } + + static int mmc_reset(void) { + int ret; + int w, i; + + w = (__raw_readw(SCPCR) & ~(SCPCR_CLK_MASK | SCPCR_CMD_MASK)) | (SCPCR_CLK_OUT | SCPCR_CMD_OUT); __raw_writew(w, SCPCR); + w = __raw_readw(SCPCR) & ~SCPCR_CMD_MASK; __raw_writew(w, SCPCR); + w = __raw_readb(SCPDR) | SCPDR_CLK | SCPDR_CMD; __raw_writeb(w, SCPDR); + w = (__raw_readw(SCPCR) & ~V1_SCPCR_CS_MASK) | V1_SCPCR_CS_OUT; __raw_writew(w, SCPCR); + __raw_writeb(0x00, SCR0); + __raw_writeb(0x00, SSR0); + __raw_writeb(0xFA, SCMR0); + __raw_writeb(0x80, SMR0); + __raw_writeb(LOW_SPD, BRR0); + for(i = 0;i < 1000;i++); + w = __raw_readb(SCPDR) | V1_SCPDR_CS; __raw_writeb(w, SCPDR); + INT_DISABLE(); + for(i = 0;i < 20;i++) sci_putch(0xff); + sci_putch_sw(); + w = __raw_readb(SCPDR) & ~V1_SCPDR_CS; __raw_writeb(w, SCPDR); + ret = mmc_command(CMD_INITIALIZE, 0, 0); + if(ret != 1) { + INT_ENABLE(); + return -1; + } + for(;;) { + ret = mmc_command(CMD_ENABLE, 0, 0); + if(ret == 0x00) break; + if(ret != 0x01) { + INT_ENABLE(); + return -1; + } + } + INT_ENABLE(); + return 0; + } + + static int mmc_config_read(char *data, int command, int len) { + int i, ret; + + INT_DISABLE(); + ret = mmc_command(command, 0, 0); + if(ret != 0) { + INT_ENABLE(); + return -1; + } + for(i = 0;i < len;i++) { + data[i] = sci_getch(); + if(i == 0 && data[0] == -2) i--; + } + __raw_writeb(LOW_SPD, BRR0); + sci_getch(); + sci_getch(); + sci_getch(); + sci_getch_sw(); + INT_ENABLE(); + return 0; + } + + static void sh_mmc_sci0_read(char *buffer) { + asm("mov %0,r1" :: "r" (buffer)); + asm( + "mov #0xe8,r3" "\n\r" + "shll2 r3" "\n\r" + "shll2 r3" "\n\r" + "_mmc_sci_read:" "\n\r" + "mov #4,r0" "\n\r" + "mov.b r0,@(2,r3)" "\n\r" + "mov #0x10,r0" "\n\r" + "mov.b r0,@(4,r3)" "\n\r" + "mov #2,r2" "\n\r" + "shll8 r2" "\n\r" + "_mmc_sci_read_L0:" "\n\r" + "mov.b @(8,r3),r0" "\n\r" + "tst #0x40,r0" "\n\r" + "bt _mmc_sci_read_L0" "\n\r" + "mov.b @(10,r3),r0" "\n\r" + "mov.b r0,@r1" "\n\r" + "add #1,r1" "\n\r" + "mov.b @(8,r3),r0" "\n\r" + "mov #0,r0" "\n\r" + "mov.b r0,@(8,r3)" "\n\r" + "dt r2" "\n\r" + "bf _mmc_sci_read_L0" "\n\r" + ); + } + + static int sci_readmmc(int addr, char *buffer) { + int ret, over; + unsigned char address[4]; + unsigned char c; + + address[0] = addr >> 24; + address[1] = addr >> 16; + address[2] = addr >> 8; + address[3] = addr; + INT_DISABLE(); + ret = mmc_command(CMD_READ, address, 4); + if(ret != 0) { + INT_ENABLE(); + return -1; + } + over = MMC_TIME_OVER; + for(;;) { + c = sci_getch(); + if(c == 0xfe) break; + if(--over == 0) { + INT_ENABLE(); + return -1; + } + } + sh_mmc_sci0_read(buffer); + __raw_writeb(LOW_SPD, BRR0); + sci_getch(); + sci_getch(); + sci_getch(); + sci_getch_sw(); + INT_ENABLE(); + return 0; + } + + static void sh_mmc_sci0_write(char *buffer) { + asm("mov %0,r1" :: "r" (buffer)); + asm( + "mov #0xe8,r3" "\n\r" + "shll2 r3" "\n\r" + "shll2 r3" "\n\r" + "_mmc_sci_write:" "\n\r" + "mov #4,r0" "\n\r" + "mov.b r0,@(2,r3)" "\n\r" + "mov #0x20,r0" "\n\r" + "mov.b r0,@(4,r3)" "\n\r" + "mov #2,r2" "\n\r" + "shll8 r2" "\n\r" + "_mmc_sci_write_L0:" "\n\r" + "mov.b @(8,r3),r0" "\n\r" + "tst #0x80,r0" "\n\r" + "bt _mmc_sci_write_L0" "\n\r" + "mov.b @r1,r0" "\n\r" + "mov.b r0,@(6,r3)" "\n\r" + "add #1,r1" "\n\r" + "mov.b @(8,r3),r0" "\n\r" + "mov #0,r0" "\n\r" + "mov.b r0,@(8,r3)" "\n\r" + "dt r2" "\n\r" + "bf _mmc_sci_write_L0" "\n\r" + ); + } + + static int sci_writemmc(int addr, char *buffer) { + int ret, over; + unsigned char address[4]; + + address[0] = addr >> 24; + address[1] = addr >> 16; + address[2] = addr >> 8; + address[3] = addr; + INT_DISABLE(); + ret = mmc_command(CMD_WRITE, address, 4); + if(ret != 0) { + INT_ENABLE(); + return -1; + } + sci_putch(0xfe); + sh_mmc_sci0_write(buffer); + __raw_writeb(LOW_SPD, BRR0); + sci_putch(0); + sci_putch(0); + sci_putch(0); + sci_putch_sw(); + over = MMC_TIME_OVER; + while(sci_getch() != 0xff) { + if(--over == 0) { + INT_ENABLE(); + return -1; + } + } + sci_getch_sw(); + INT_ENABLE(); + return 0; + } + + #endif + + static int ssu_cmd(int media, unsigned char cmd, unsigned int address, unsigned char *data, unsigned int len, unsigned int rw) { + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + volatile int w; + #endif + unsigned char crc; + unsigned int cnt = 0, status = 0; + int i; + + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + if(board_id == SH7706LANV2) { + w = __raw_readb(SCPDR) & ~V2_SCPDR_CS; __raw_writeb(w, SCPDR); + } + #endif + INT_DISABLE(); + switch(cmd) { + case CMD_INITIALIZE: + crc = 0x95; + break; + case CMD_CHECK: + crc = 0x87; + break; + default: + crc = 0x01; + } + *(spidr) = 0xff; + while((*(spisr) & 0x80) == 0x00); + *(spidr) = cmd + 0x40; + while((*(spisr) & 0x80) == 0x00); + for(i = 24;i >= 0;i -= 8) { + *(spidr) = address >> i; + while((*(spisr) & 0x80) == 0x00); + } + *(spidr) = crc; + for(cnt = 128;cnt != 0;cnt--) { + while((*(spisr) & 0x80) == 0x00); + status = *(spibr); + if(!(status & 0x80)) break; + } + if(cnt == 0) { + INT_ENABLE(); + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + if(board_id == SH7706LANV2) { + w = (__raw_readw(SCPCR) & ~V2_SCPCR_CS_MASK) | V2_SCPCR_CS_OUT; __raw_writew(w, SCPCR); + w = __raw_readb(SCPDR) | V2_SCPDR_CS; __raw_writeb(w, SCPDR); + } + #endif + return -1; + } + if((status & 0x04) == 0) { + switch(cmd) { + case CMD_CHECK: + case CMD_OCD: + status = 0; + for(i = 0;i < 4;i++) { + status <<= 8; + while((*(spisr) & 0x80) == 0x00); + status |= *(spibr); + } + break; + } + } + if(len > 0) { + if(rw == READ) { + for(cnt = 20000;cnt != 0;cnt--) { + while((*(spisr) & 0x80) == 0x00); + if(*(spibr) == 0xfe) { + for(i = 0;i < len;i++) { + while((*(spisr) & 0x80) == 0x00); + data[i] = *(spibr); + } + while((*(spisr) & 0x80) == 0x00); + crc = *(spibr); + while((*(spisr) & 0x80) == 0x00); + crc = *(spibr); + while((*(spisr) & 0x80) == 0x00); + break; + } + } + } else { + while((*(spisr) & 0x80) == 0x00); + *(spidr) = 0xfe; + while((*(spisr) & 0x80) == 0x00); + for(i = 0;i < len;i++) { + *(spidr) = data[i]; + while((*(spisr) & 0x80) == 0x00); + } + *(spidr) = 0; + while((*(spisr) & 0x80) == 0x00); + *(spidr) = 0; + while((*(spisr) & 0x80) == 0x00); + *(spidr) = 0xff; + while((*(spisr) & 0x80) == 0x00); + if ((*(spidr) & 0x0f) != 5) { + cnt = 0; + } else { + for(;;) { + *(spidr) = 0xff; + while((*(spisr) & 0x80) == 0x00); + if(*(spidr) == 0xff) break; + } + } + } + } else { + while((*(spisr) & 0x80) == 0x00); + } + INT_ENABLE(); + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + if(board_id == SH7706LANV2) { + w = (__raw_readw(SCPCR) & ~V2_SCPCR_CS_MASK) | V2_SCPCR_CS_OUT; __raw_writew(w, SCPCR); + w = __raw_readb(SCPDR) | V2_SCPDR_CS; __raw_writeb(w, SCPDR); + } + #endif + return (cnt == 0) ? -1 : status; + } + + static int ssu_reset(int media) { + volatile int w; + int i, s, ver; + + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + if(board_id == SH7706LANV2) { + w = (__raw_readw(SCPCR) & ~V2_SCPCR_CS_MASK) | V2_SCPCR_CS_OUT; __raw_writew(w, SCPCR); + w = __raw_readb(SCPDR) | V2_SCPDR_CS; __raw_writeb(w, SCPDR); + } + #endif + for(i = 0;i < 10;i++) { + *(spidr) = 0xff; + while((*(spisr) & 0x80) == 0x00); + } + if(ssu_cmd(media, CMD_INITIALIZE, 0, 0, 0, READ) == -1) { + return -1; + } + s = ssu_cmd(media, CMD_CHECK, 0x1aa, 0, 0, READ); + ver = (s == 0x1aa) ? 2 : 1; + do { + if(ver == 2) { + ssu_cmd(media, CMD_APP, 0, 0, 0, READ); + s = ssu_cmd(media, ACMD_COND, 0x40000000, 0, 0, READ); + } else { + s = ssu_cmd(media, CMD_ENABLE, 0, 0, 0, READ); + } + if(s == -1) return -1; + } while(s != 0); + for(w = 0;w < 100;w++); + return 0; + } + + static int mmc_card_status(int media) { + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + int w; + #endif + int status; + + status = -1; + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + switch(board_id) { + case SH7706LANV1: + w = __raw_readw(PGCR); __raw_writew(w | V1_PGCR_EJECT, PGCR); + status = (__raw_readb(PGDR) & V1_PGDR_EJECT) ? -1 : 0; + break; + case SH7706LANV2: + w = __raw_readw(SCPCR); __raw_writew(w | V2_SCPCR_EJECT, SCPCR); + status = (__raw_readb(SCPDR) & V2_SCPDR_EJECT) ? -1 : 0; + break; + } + #endif + return status; + } + + static int mmc_media_init(int media) { + int ret; + unsigned int read_len, c_size, c_size_mult; + sector_t mediasize; + struct gendisk *disk = shmmc_gendisk; + unsigned char csd[16]; + + ret = -1; + if(mmc_card_status(media) == -1) return -1; + + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + switch(board_id) { + case SH7706LANV1: + ret = mmc_reset(); + break; + case SH7706LANV2: + ret = ssu_reset(0); + break; + } + #endif + + if(ret == -1) { + printk(KERN_ERR "%s: Media I/O Error.\n", disk->disk_name); + return 0; + } + printk(KERN_INFO "%s: MMC Reset OK.\n", disk->disk_name); + + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + switch(board_id) { + case SH7706LANV1: + ret = mmc_config_read(csd, CMD_CSD, 16); + break; + case SH7706LANV2: + ret = ssu_cmd(media, CMD_CSD, 0, csd, 16, READ); + break; + } + #endif + + if(ret == -1) { + printk(KERN_ERR "%s: MMC DISK CSD Read Error.\n", disk->disk_name); + return 0; + } + + sdhc = 0; + if(board_id == SH7706LANV2) { + ret = ssu_cmd(media, CMD_OCD, 0, 0, 0, READ); + if(ret & HCS) sdhc = 1; + } + if(sdhc) { + c_size = (((int)csd[7] & 0x3f) << 16) | (((int)csd[8] & 0xff) << 8) | ((int)csd[9] & 0xff); + mediasize = c_size + 1; + mediasize <<= 10; + printk(KERN_INFO "%s: SDHC Card\n", disk->disk_name); + } else { + read_len = (int)csd[5] & 0x0f; + c_size = (((int)csd[6] & 0x03) << 10) | ((int)csd[7] << 2) | ((int)(csd[8] & 0xc0) >> 6); + c_size_mult = (((int)csd[9] & 0x03) << 1) | (((int)csd[10] & 0x80) >> 7); + mediasize = c_size + 1; + mediasize <<= c_size_mult + 2; + mediasize <<= read_len - 9; + } + return mediasize; + } + + static int do_simple_request(struct request *rq, unsigned int *nr_bytes) { + int ret = SUCCESS; + struct bio_vec bvec; + struct req_iterator iter; + loff_t pos = blk_rq_pos(rq) << SECTOR_SHIFT; + loff_t dev_size = (loff_t)(disksize << SECTOR_SHIFT); + loff_t pos2; + + printk(KERN_WARNING "sblkdev: request start from sector %ld\n", blk_rq_pos(rq)); + + rq_for_each_segment(bvec, rq, iter) { + unsigned long b_len = bvec.bv_len; + void *b_buf = page_address(bvec.bv_page) + bvec.bv_offset; + + printk(KERN_WARNING "sblkdev: request size from sector %ld\n", b_len); + + if((pos + b_len) > dev_size) b_len = (unsigned long)(dev_size - pos); + if(board_id == SH7706LANV1) { + if (rq_data_dir (rq)) { // WRITE + sci_writemmc(pos, b_buf); + } else { // READ + sci_readmmc(pos, b_buf); + } + } else { + if(sdhc) { + pos2 = pos >> SECTOR_SHIFT; + } else { + pos2 = pos; + } + if (rq_data_dir (rq)) { // WRITE + ssu_cmd(0, CMD_WRITE, pos2, b_buf, b_len, rq_data_dir(rq)); + } else { // READ + ssu_cmd(0, CMD_READ, pos2, b_buf, b_len, rq_data_dir(rq)); + } + } + pos += b_len; + *nr_bytes += b_len; + } + return ret; + } + + static blk_status_t mmc_rq_fn(struct request *req) { + void *buffer; + unsigned int rw, address; + unsigned long long start, len, offset, adr; + struct gendisk *disk = shmmc_gendisk; + + start = blk_rq_pos(req); + len = blk_rq_cur_sectors(req); + start <<= 9; + len <<= 9; + rw = rq_data_dir(req); + if (blk_rq_is_passthrough(req)) { + printk (KERN_NOTICE "Skip non-CMD request\n"); + // __blk_end_request_all(req, -EIO); + return BLK_STS_IOERR; + } + if ((blk_rq_pos(req) + blk_rq_cur_sectors(req)) > disksize) { + printk( KERN_ERR "%s: bad access: block=%lu, count=%u\n", + disk->disk_name, blk_rq_pos(req), blk_rq_cur_sectors(req)); + // __blk_end_request_all(req, -EIO); + return BLK_STS_IOERR; + } + buffer = bio_data(req->bio); + for(offset = 0;offset < len;offset += 0x200) { + switch(board_id) { + #if defined(CONFIG_CPU_SUBTYPE_SH7706) + case SH7706LANV1: + address = (unsigned int)(start + offset); + if (rw == READ) { + sci_readmmc(address, &(buffer[offset])); + } else { + sci_writemmc(address, &(buffer[offset])); + } + break; + case SH7706LANV2: + #endif + if(sdhc) { + adr = start + offset; + adr >>= 9; + address = (unsigned int)adr; + } else { + address = (unsigned int)(start + offset); + } + if (rw == READ) { + ssu_cmd(0, CMD_READ, address, &(buffer[offset]), 512, rw); + } else { + ssu_cmd(0, CMD_WRITE, address, &(buffer[offset]), 512, rw); + } + break; + } + } + return BLK_STS_OK; + } + + static blk_status_t shmmc_queue_rq(struct blk_mq_hw_ctx *hctx, const struct blk_mq_queue_data *bd) { + blk_status_t status; + struct request *rq = bd->rq; + unsigned int nr_bytes = 0; + + blk_mq_start_request(rq); + + status = mmc_rq_fn(rq); + + // if(do_simple_request(rq, &nr_bytes) != SUCCESS) status = BLK_STS_IOERR; + // printk(KERN_WARNING "sblkdev: request process %d bytes \n", nr_bytes); + + blk_mq_end_request (rq, status); + + return status; + } + + static int shmmc_open(struct block_device *bdev, fmode_t mode) { + int device; + int rc = -ENOMEM; + + device = MINOR(bdev->bd_dev); + + mutex_lock(&shmmc_mutex); + + mutex_unlock(&shmmc_mutex); + return 0; + + err_out: + mutex_unlock(&shmmc_mutex); + return rc; + } + + static void shmmc_release(struct gendisk *disk, fmode_t mode) { + mutex_lock(&shmmc_mutex); + if ( current_device == -1 ) { + mutex_unlock(&shmmc_mutex); + return; + } + mutex_unlock(&shmmc_mutex); + } + + static const struct block_device_operations shmmc_fops = { + .owner = THIS_MODULE, + .open = shmmc_open, + .release = shmmc_release, + }; + + /*static struct kobject *shmmc_find(dev_t dev, int *part, void *data) { + *part = 0; + return get_disk_and_module(shmmc_gendisk); + }*/ + + static struct request_queue *shmmc_queue; + static struct blk_mq_tag_set tag_set; + + static const struct blk_mq_ops shmmc_mq_ops = { + .queue_rq = shmmc_queue_rq, + }; + + static int __init shmmc_init(void) { + int ret, rc; + + board_id = SH7706LANV1; + if(__raw_readb(0xb0008006) == 0xab) board_id = SH7706LANV2; + if(board_id == SH7706LANV2) { + spidr = (volatile unsigned char *)0xb0008000; + spibr = (volatile unsigned char *)0xb0008004; + spisr = (volatile unsigned char *)0xb0008002; + } + + ret = -EBUSY; + mmc_major = 0; + rc = register_blkdev(0, DEVICE_NAME); + printk(KERN_INFO "rc %d\n", rc); + if(rc < 0) goto err; + mmc_major = rc; + + ret = -ENOMEM; + shmmc_gendisk = alloc_disk(16); // Max parition number + if (!shmmc_gendisk) goto out_disk; + + shmmc_queue = blk_mq_init_sq_queue(&tag_set, &shmmc_mq_ops, 16, BLK_MQ_F_SHOULD_MERGE); + if (IS_ERR(shmmc_queue)) { + ret = PTR_ERR(shmmc_queue); + shmmc_queue = NULL; + goto out_queue; + } + + shmmc_gendisk->major = mmc_major; + shmmc_gendisk->first_minor = 0; + shmmc_gendisk->fops = &shmmc_fops; + shmmc_gendisk->private_data = 0; + sprintf(shmmc_gendisk->disk_name, DEVICE_NAME); + shmmc_gendisk->queue = shmmc_queue; + + disksize = mmc_media_init(0); + printk(KERN_INFO "Media size is %ld\n", disksize); + set_capacity(shmmc_gendisk, disksize); + + blk_queue_bounce_limit(shmmc_queue, BLK_BOUNCE_HIGH); + blk_queue_max_segments(shmmc_queue, 1); + blk_queue_segment_boundary(shmmc_queue, 0xffffffff); + blk_queue_max_hw_sectors(shmmc_queue, 1); + blk_queue_logical_block_size(shmmc_queue, MMC_BLKSIZ); + + add_disk(shmmc_gendisk); + // blk_register_region(MKDEV(mmc_major, 0), MMC_MINOR_COUNT, THIS_MODULE, shmmc_find, NULL, NULL); + + return 0; + + out_queue: + put_disk(shmmc_gendisk); + out_disk: + unregister_blkdev(mmc_major, DEVICE_NAME); + err: + return ret; + } + + static void __exit shmmc_exit(void) { + int i, j; + + // blk_unregister_region(MKDEV(mmc_major, 0), MMC_MINOR_COUNT); + unregister_blkdev(mmc_major, DEVICE_NAME); + del_gendisk(shmmc_gendisk); + put_disk(shmmc_gendisk); + blk_cleanup_queue(shmmc_queue); + blk_mq_free_tag_set(&tag_set); + return; + } + + module_init(shmmc_init); + module_exit(shmmc_exit); + MODULE_LICENSE("GPL"); diff -Ncr linux-5.11.1/arch/sh/drivers/mmc/sh_mmc.h linux-5.11.1-shmin/arch/sh/drivers/mmc/sh_mmc.h *** linux-5.11.1/arch/sh/drivers/mmc/sh_mmc.h 1970-01-01 09:00:00.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/drivers/mmc/sh_mmc.h 2022-04-18 22:35:23.263125829 +0900 *************** *** 0 **** --- 1,99 ---- + #define RETRY_NUM 12 + + #define MMC_CMD_INIT 0x40 + + #define CMD_INITIALIZE 0 + #define CMD_ENABLE 1 + #define CMD_CHECK 8 + #define CMD_CSD 9 + #define CMD_CID 10 + #define CMD_READ 17 + #define CMD_MREAD 18 + #define CMD_WRITE 24 + #define CMD_MWRITE 25 + #define ACMD_COND 41 + #define CMD_APP 55 + #define CMD_OCD 58 + + #define HCS 0x40000000 + + #define LOW_SPD 144 + #define MID_SPD 32 + #define MMC_TIME_OVER 1500 + + // SMR + #define SCI_CA 0x80 + #define SCI_CHR 0x40 + #define SCI_PE 0x20 + #define SCI_OE 0x10 + #define SCI_STOP 0x08 + #define SCI_MP 0x04 + + // SCR + #define SCI_TIE 0x80 + #define SCI_RIE 0x40 + #define SCI_TE 0x20 + #define SCI_RE 0x10 + #define SCI_MPIE 0x08 + #define SCI_TEIE 0x04 + #define SCK_OUT 0 + #define SCK_IN 2 + + // SSR + #define SCI_TDRE 0x80 + #define SCI_RDRF 0x40 + #define SCI_ORER 0x20 + #define SCI_FER 0x10 + #define SCI_PER 0x08 + #define SCI_TEND 0x04 + #define SCI_MPB 0x02 + #define SCI_MPBT 0x01 + + #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ + defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) + #define PGCR 0xA400010C /* 16 bit EJECT */ + #define PGDR 0xA400012C /* 8 bit EJECT */ + #define SCPCR 0xA4000116 /* 16 bit SCI */ + #define SCPDR 0xA4000136 /* 8 bit SCI */ + #define SMR0 0xFFFFFE80 /* 8 bit SCI */ + #define BRR0 0xFFFFFE82 /* 8 bit SCI */ + #define SCR0 0xFFFFFE84 /* 8 bit SCI */ + #define TDR0 0xFFFFFE86 /* 8 bit SCI */ + #define SSR0 0xFFFFFE88 /* 8 bit SCI */ + #define RDR0 0xFFFFFE8A /* 8 bit SCI */ + #define SCMR0 0xFFFFFE8C /* 8 bit SCI */ + + #define SCPCR_CLK_MASK 0x000C + #define SCPCR_CLK_IN 0x000C + #define SCPCR_CLK_OUT 0x0004 + #define SCPDR_CLK 0x02 + #define SCPCR_DAT_MASK 0x0003 + #define SCPCR_DAT_IN 0x0003 + #define SCPCR_DAT_OUT 0x0001 + #define SCPDR_DAT 0x01 + #define SCPCR_CMD_MASK 0x0030 + #define SCPCR_CMD_IN 0x0030 + #define SCPCR_CMD_OUT 0x0010 + #define SCPDR_CMD 0x04 + #define V1_SCPCR_CS_MASK 0x00C0 + #define V1_SCPCR_CS_IN 0x00C0 + #define V1_SCPCR_CS_OUT 0x0040 + #define V1_SCPDR_CS 0x08 + #define V1_PGCR_EJECT 0x0300 + #define V1_PGDR_EJECT 0x10 + #define V2_SCPCR_CS_MASK 0x000C + #define V2_SCPCR_CS_OUT 0x0004 + #define V2_SCPDR_CS 0x02 + #define V2_SCPCR_EJECT 0x00C0 + #define V2_SCPDR_EJECT 0x08 + #define V3_SCPCR_POWER_MASK 0x00CC + #define V3_SCPCR_POWER_OUT 0x0044 + #define V3_SCPDR_POWER 0x0A + + #endif + + #define MMC_COUNT 2 + + #define INT_DISABLE() {int reg;asm("stc sr,%0" : "=r" (reg));reg |= 0x100000f0;asm("ldc %0,sr" :: "r" (reg));} + #define INT_ENABLE() {int reg;asm("stc sr,%0" : "=r" (reg));reg &= ~0x100000f0;asm("ldc %0,sr" :: "r" (reg));} + diff -Ncr linux-5.11.1/arch/sh/include/asm/traps.h linux-5.11.1-shmin/arch/sh/include/asm/traps.h *** linux-5.11.1/arch/sh/include/asm/traps.h 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/include/asm/traps.h 2022-04-18 22:35:23.263125829 +0900 *************** *** 6,18 **** # include - BUILD_TRAP_HANDLER(address_error); - BUILD_TRAP_HANDLER(debug); - BUILD_TRAP_HANDLER(bug); - BUILD_TRAP_HANDLER(breakpoint); - BUILD_TRAP_HANDLER(singlestep); - BUILD_TRAP_HANDLER(fpu_error); - BUILD_TRAP_HANDLER(fpu_state_restore); - BUILD_TRAP_HANDLER(nmi); - #endif /* __ASM_SH_TRAPS_H */ --- 6,9 ---- diff -Ncr linux-5.11.1/arch/sh/include/asm/traps_32.h linux-5.11.1-shmin/arch/sh/include/asm/traps_32.h *** linux-5.11.1/arch/sh/include/asm/traps_32.h 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/include/asm/traps_32.h 2022-04-18 22:35:23.263125829 +0900 *************** *** 40,53 **** ); } - asmlinkage void do_address_error(struct pt_regs *regs, - unsigned long writeaccess, - unsigned long address); - asmlinkage void do_divide_error(unsigned long r4); - asmlinkage void do_reserved_inst(void); - asmlinkage void do_illegal_slot_inst(void); - asmlinkage void do_exception_error(void); - #define BUILD_TRAP_HANDLER(name) \ asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \ unsigned long r6, unsigned long r7, \ --- 40,45 ---- diff -Ncr linux-5.11.1/arch/sh/include/cpu-sh3/cpu/watchdog.h linux-5.11.1-shmin/arch/sh/include/cpu-sh3/cpu/watchdog.h *** linux-5.11.1/arch/sh/include/cpu-sh3/cpu/watchdog.h 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/include/cpu-sh3/cpu/watchdog.h 2022-04-18 22:35:23.263125829 +0900 *************** *** 8,15 **** #define __ASM_CPU_SH3_WATCHDOG_H /* Register definitions */ ! #define WTCNT 0xffffff84 ! #define WTCSR 0xffffff86 /* Bit definitions */ #define WTCSR_TME 0x80 --- 8,20 ---- #define __ASM_CPU_SH3_WATCHDOG_H /* Register definitions */ ! #if defined(CONFIG_CPU_SUBTYPE_SH7721) ! #define WTCNT 0xa415ff84 ! #define WTCSR 0xa415ff86 ! #else ! #define WTCNT 0xffffff84 ! #define WTCSR 0xffffff86 ! #endif /* Bit definitions */ #define WTCSR_TME 0x80 *************** *** 19,22 **** #define WTCSR_IOVF 0x08 #endif /* __ASM_CPU_SH3_WATCHDOG_H */ - --- 24,26 ---- diff -Ncr linux-5.11.1/arch/sh/include/cpu-sh4/cpu/freq.h linux-5.11.1-shmin/arch/sh/include/cpu-sh4/cpu/freq.h *** linux-5.11.1/arch/sh/include/cpu-sh4/cpu/freq.h 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/include/cpu-sh4/cpu/freq.h 2022-04-18 22:35:23.263125829 +0900 *************** *** 26,31 **** --- 26,33 ---- #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ defined(CONFIG_CPU_SUBTYPE_SH7780) #define FRQCR 0xffc80000 + #elif defined(CONFIG_CPU_SUBTYPE_SH7730) + #define FRQCR 0xa4150000 #elif defined(CONFIG_CPU_SUBTYPE_SH7724) #define FRQCRA 0xa4150000 #define FRQCRB 0xa4150004 diff -Ncr linux-5.11.1/arch/sh/kernel/cpu/sh3/setup-sh770x.c linux-5.11.1-shmin/arch/sh/kernel/cpu/sh3/setup-sh770x.c *** linux-5.11.1/arch/sh/kernel/cpu/sh3/setup-sh770x.c 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/kernel/cpu/sh3/setup-sh770x.c 2022-04-18 22:35:23.263125829 +0900 *************** *** 90,96 **** static struct resource rtc_resources[] = { [0] = { .start = 0xfffffec0, ! .end = 0xfffffec0 + 0x1e, .flags = IORESOURCE_IO, }, [1] = { --- 90,96 ---- static struct resource rtc_resources[] = { [0] = { .start = 0xfffffec0, ! .end = 0xfffffec0 + 0x1f, .flags = IORESOURCE_IO, }, [1] = { diff -Ncr linux-5.11.1/arch/sh/kernel/cpu/sh4/probe.c linux-5.11.1-shmin/arch/sh/kernel/cpu/sh4/probe.c *** linux-5.11.1/arch/sh/kernel/cpu/sh4/probe.c 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/kernel/cpu/sh4/probe.c 2022-04-18 22:35:23.263125829 +0900 *************** *** 105,111 **** case 0x200A: if (prr == 0x61) boot_cpu_data.type = CPU_SH7781; ! else if (prr == 0xa1) boot_cpu_data.type = CPU_SH7763; else boot_cpu_data.type = CPU_SH7780; --- 105,111 ---- case 0x200A: if (prr == 0x61) boot_cpu_data.type = CPU_SH7781; ! else if (prr == 0xa2) boot_cpu_data.type = CPU_SH7763; else boot_cpu_data.type = CPU_SH7780; *************** *** 132,137 **** --- 132,141 ---- boot_cpu_data.type = CPU_SH7723; boot_cpu_data.flags |= CPU_HAS_L2_CACHE; break; + case 0x90: + boot_cpu_data.type = CPU_SH7730; + boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_L2_CACHE; + break; case 0x70: boot_cpu_data.type = CPU_SH7366; break; diff -Ncr linux-5.11.1/arch/sh/kernel/cpu/sh4a/Makefile linux-5.11.1-shmin/arch/sh/kernel/cpu/sh4a/Makefile *** linux-5.11.1/arch/sh/kernel/cpu/sh4a/Makefile 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/kernel/cpu/sh4a/Makefile 2022-04-18 22:35:23.267125857 +0900 *************** *** 6,11 **** --- 6,12 ---- # CPU subtype setup obj-$(CONFIG_CPU_SUBTYPE_SH7757) += setup-sh7757.o obj-$(CONFIG_CPU_SUBTYPE_SH7763) += setup-sh7763.o + obj-$(CONFIG_CPU_SUBTYPE_SH7730) += setup-sh7730.o obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o *************** *** 24,29 **** --- 25,31 ---- # Primary on-chip clocks (common) clock-$(CONFIG_CPU_SUBTYPE_SH7757) := clock-sh7757.o clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o + clock-$(CONFIG_CPU_SUBTYPE_SH7730) := clock-sh7730.o clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o diff -Ncr linux-5.11.1/arch/sh/kernel/reboot.c linux-5.11.1-shmin/arch/sh/kernel/reboot.c *** linux-5.11.1/arch/sh/kernel/reboot.c 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/arch/sh/kernel/reboot.c 2022-04-18 22:44:33.669028494 +0900 *************** *** 16,22 **** static void watchdog_trigger_immediate(void) { sh_wdt_write_cnt(0xFF); ! sh_wdt_write_csr(0xC2); } static void native_machine_restart(char * __unused) --- 16,22 ---- static void watchdog_trigger_immediate(void) { sh_wdt_write_cnt(0xFF); ! sh_wdt_write_csr(0xC7); } static void native_machine_restart(char * __unused) *************** *** 26,34 **** /* Destroy all of the TLBs in preparation for reset by MMU */ __flush_tlb_global(); - /* Address error with SR.BL=1 first. */ - trigger_address_error(); - /* If that fails or is unsupported, go for the watchdog next. */ watchdog_trigger_immediate(); --- 26,31 ---- diff -Ncr linux-5.11.1/drivers/net/ethernet/8390/Kconfig linux-5.11.1-shmin/drivers/net/ethernet/8390/Kconfig *** linux-5.11.1/drivers/net/ethernet/8390/Kconfig 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/drivers/net/ethernet/8390/Kconfig 2022-04-18 22:50:50.400254586 +0900 *************** *** 29,34 **** --- 29,43 ---- To compile this driver as a module, choose M here: the module will be called axnet_cs. If unsure, say N. + config AX88796B + tristate "ASIX AX88796B NE2000 clone support" + depends on ARM || MIPS || SUPERH + select CRC32 + select MII + help + AX88796 driver, using platform bus to provide + chip detection and resources + config AX88796 tristate "ASIX AX88796 NE2000 clone support" if !ZORRO depends on (ARM || MIPS || SUPERH || ZORRO || COMPILE_TEST) diff -Ncr linux-5.11.1/drivers/net/ethernet/8390/Makefile linux-5.11.1-shmin/drivers/net/ethernet/8390/Makefile *** linux-5.11.1/drivers/net/ethernet/8390/Makefile 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/drivers/net/ethernet/8390/Makefile 2022-04-18 22:35:23.267125857 +0900 *************** *** 6,11 **** --- 6,12 ---- obj-$(CONFIG_MAC8390) += mac8390.o obj-$(CONFIG_APNE) += apne.o 8390.o obj-$(CONFIG_ARM_ETHERH) += etherh.o + obj-$(CONFIG_AX88796B) += ax88796b.o obj-$(CONFIG_AX88796) += ax88796.o obj-$(CONFIG_HYDRA) += hydra.o obj-$(CONFIG_MCF8390) += mcf8390.o diff -Ncr linux-5.11.1/drivers/net/ethernet/8390/ax88796b.c linux-5.11.1-shmin/drivers/net/ethernet/8390/ax88796b.c *** linux-5.11.1/drivers/net/ethernet/8390/ax88796b.c 1970-01-01 09:00:00.000000000 +0900 --- linux-5.11.1-shmin/drivers/net/ethernet/8390/ax88796b.c 2022-04-18 22:35:23.271125886 +0900 *************** *** 0 **** --- 1,2185 ---- + /* + * ============================================================================ + * ax88796b.c: Linux2.6.x Ethernet device driver for ASIX AX88796B chip. + * + * This program is free software; you can distrine_block_inputbute it and/or + * modify it under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more + * details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * This program is based on + * + * ne.c: A general non-shared-memory NS8390 ethernet driver for linux + * Written 1992-94 by Donald Becker. + * + * 8390. c: A general NS8390 ethernet driver core for linux. + * Written 1992-94 by Donald Becker. + * + * ============================================================================ + */ + #include + #include "ax88796b.h" + + /* NAMING CONSTANT DECLARATIONS */ + #define DRV_NAME "AX88796B" + #define ADP_NAME "ASIX AX88796B Ethernet Adapter" + #define DRV_VERSION "2.1.0" + #define PFX DRV_NAME ": " + + #define PRINTK(flag, args...) if (flag & DEBUG_FLAGS) printk(args) + + + #ifdef CONFIG_SH_SHMIN + #define CONFIG_AX88796B_USE_MEMCPY 0 + #define CONFIG_AX88796B_8BIT_WIDE 1 + #else + #define CONFIG_AX88796B_USE_MEMCPY 1 + #define CONFIG_AX88796B_8BIT_WIDE 0 + #endif /*CONFIG_SH_SHMIN*/ + + #define CONFIG_AX88796B_EEPROM_READ_WRITE 0 + + /* LOCAL VARIABLES DECLARATIONS */ + static char version[] = + KERN_INFO ADP_NAME ":v" DRV_VERSION "\n" + KERN_INFO " http://www.asix.com.tw\n"; + + static unsigned int media = 0; + static int mem = 0; + static int irq = 0; + + module_param (mem, int, 0); + module_param (irq, int, 0); + module_param (media, int, 0); + + MODULE_PARM_DESC (mem, "MEMORY base address(es),required"); + MODULE_PARM_DESC (irq, "IRQ number(s)"); + MODULE_PARM_DESC (media, + "Media Mode(0=auto, 1=100full, 2=100half, 3=10full, 4=10half)"); + + MODULE_DESCRIPTION ("ASIX AX88796B Fast Ethernet driver"); + MODULE_LICENSE ("GPL"); + + static int ax_get_link (struct ax_device *ax_local); + + #if (CONFIG_AX88796B_8BIT_WIDE == 1) + static inline u16 READ_FIFO (void *membase) + { + u16 h,l; + l = readb (membase); + //udelay(10); + h = readb (membase); + return l | (h << 8); + } + + static inline void WRITE_FIFO (void *membase, u16 data) + { + writeb ((u8)data , membase); + writeb ((u8)(data >> 8) , membase); + } + #else + static inline u16 READ_FIFO (void *membase) + { + return readw (membase); + } + + static inline void WRITE_FIFO (void *membase, u16 data) + { + writew (data, membase); + } + #endif + + static inline struct ax_device *ax_get_priv (struct net_device *ndev) + { + return (struct ax_device *) netdev_priv (ndev); + } + + /* + * ====================================================================== + * MII interface support + * ====================================================================== + */ + #define MDIO_SHIFT_CLK 0x01 + #define MDIO_DATA_WRITE0 0x00 + #define MDIO_DATA_WRITE1 0x08 + #define MDIO_DATA_READ 0x04 + #define MDIO_MASK 0x0f + #define MDIO_ENB_IN 0x02 + + /* + * ---------------------------------------------------------------------------- + * Function Name: mdio_sync + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void mdio_sync (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + int bits; + for (bits = 0; bits < 32; bits++) { + writeb (MDIO_DATA_WRITE1, ax_base + AX88796_MII_EEPROM); + writeb (MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: mdio_sync + * Purpose: + * ---------------------------------------------------------------------------- + */ + static int mdio_read (struct net_device *ndev, int phy_id, int loc) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + u_int cmd = (0xf6<<10)|(phy_id<<5)|loc; + int i, retval = 0; + + mdio_sync (ndev); + for (i = 13; i >= 0; i--) { + int dat = (cmd&(1< 0; i--) { + writeb (MDIO_ENB_IN, ax_base + AX88796_MII_EEPROM); + retval = (retval << 1) | ((readb (ax_base + AX88796_MII_EEPROM) + & MDIO_DATA_READ) != 0); + writeb (MDIO_ENB_IN | MDIO_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + + return (retval>>1) & 0xffff; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: mdio_write + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void mdio_write (struct net_device *ndev, int phy_id, int loc, int value) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value; + int i; + + mdio_sync (ndev); + for (i = 31; i >= 0; i--) { + int dat = (cmd&(1<= 0; i--) { + writeb (MDIO_ENB_IN, ax_base + AX88796_MII_EEPROM); + writeb (MDIO_ENB_IN | MDIO_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + + } + + + #if (CONFIG_AX88796B_EEPROM_READ_WRITE == 1) + /* + * ====================================================================== + * EEPROM interface support + * ====================================================================== + */ + #define EEPROM_SHIFT_CLK (0x80) + #define EEPROM_DATA_READ1 (0x40) + #define EEPROM_DATA_WRITE0 (0x00) + #define EEPROM_DATA_WRITE1 (0x20) + #define EEPROM_SELECT (0x10) + #define EEPROM_DIR_IN (0x02) + + #define EEPROM_READ (0x02) + #define EEPROM_EWEN (0x00) + #define EEPROM_ERASE (0x03) + #define EEPROM_WRITE (0x01) + #define EEPROM_ERALL (0x00) + #define EEPROM_WRAL (0x00) + #define EEPROM_EWDS (0x00) + #define EEPROM_93C46_OPCODE(x) ((x) << 6) + #define EEPROM_93C46_STARTBIT (1 << 8) + + /* + * ---------------------------------------------------------------------------- + * Function Name: eeprom_write_en + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void + eeprom_write_en (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + + unsigned short cmd = EEPROM_93C46_STARTBIT | + EEPROM_93C46_OPCODE(EEPROM_EWEN) | 0x30; + unsigned char tmp; + int i; + + // issue a "SB OP Addr" command + for (i = 8; i >= 0 ; i--) { + tmp = (cmd & (1 << i)) == 0 ? + EEPROM_DATA_WRITE0 : EEPROM_DATA_WRITE1; + writeb (tmp | EEPROM_SELECT, ax_base + AX88796_MII_EEPROM); + writeb (tmp | EEPROM_SELECT | EEPROM_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + + for (i = 15; i >= 0; i--) { + writeb (EEPROM_DATA_WRITE0 | EEPROM_SELECT, + ax_base + AX88796_MII_EEPROM); + writeb (EEPROM_DATA_WRITE0 | EEPROM_SELECT | EEPROM_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + + writeb (0, ax_base + AX88796_MII_EEPROM); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: eeprom_write_dis + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void + eeprom_write_dis (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + + unsigned short cmd = EEPROM_93C46_STARTBIT | + EEPROM_93C46_OPCODE (EEPROM_EWDS); + unsigned char tmp; + int i; + + // issue a "SB OP Addr" command + for (i = 8; i >= 0 ; i--) { + tmp = (cmd & (1 << i)) == 0 ? + EEPROM_DATA_WRITE0 : EEPROM_DATA_WRITE1; + writeb (tmp | EEPROM_SELECT, ax_base + AX88796_MII_EEPROM); + writeb (tmp | EEPROM_SELECT | EEPROM_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + + for (i = 15; i >= 0; i--) { + writeb (EEPROM_DATA_WRITE0 | EEPROM_SELECT, + ax_base + AX88796_MII_EEPROM); + writeb (EEPROM_DATA_WRITE0 | EEPROM_SELECT | EEPROM_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + + writeb (0, ax_base + AX88796_MII_EEPROM); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: eeprom_write + * Purpose: + * ---------------------------------------------------------------------------- + */ + static int + eeprom_write (struct net_device *ndev, unsigned char loc, unsigned short nValue) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + + unsigned short cmd = EEPROM_93C46_STARTBIT | + EEPROM_93C46_OPCODE (EEPROM_WRITE) | loc; + unsigned char tmp; + int i; + int ret = 0; + + // issue a "SB OP Addr" command + for(i = 8; i >= 0 ; i--) { + tmp = (cmd & (1 << i)) == 0 ? + EEPROM_DATA_WRITE0 : EEPROM_DATA_WRITE1; + writeb (tmp | EEPROM_SELECT, ax_base + AX88796_MII_EEPROM); + writeb (tmp | EEPROM_SELECT | EEPROM_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + + // writing the data + for (i = 15; i >= 0; i--) { + tmp = (nValue & (1 << i)) == 0 ? + EEPROM_DATA_WRITE0 : EEPROM_DATA_WRITE1; + writeb (tmp | EEPROM_SELECT, ax_base + AX88796_MII_EEPROM); + writeb (tmp | EEPROM_SELECT | EEPROM_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + + // + // check busy + // + + // Turn, wait two clocks + writeb (EEPROM_DIR_IN, ax_base + AX88796_MII_EEPROM); + writeb (EEPROM_SHIFT_CLK | EEPROM_DIR_IN, ax_base + AX88796_MII_EEPROM); + writeb (EEPROM_DIR_IN, ax_base + AX88796_MII_EEPROM); + writeb (EEPROM_SHIFT_CLK | EEPROM_DIR_IN, ax_base + AX88796_MII_EEPROM); + + // waiting for busy signal + i = 0xFFFF; + while (--i) { + writeb (EEPROM_SELECT | EEPROM_DIR_IN, + ax_base + AX88796_MII_EEPROM); + writeb (EEPROM_SELECT | EEPROM_DIR_IN | EEPROM_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + tmp = readb (ax_base + AX88796_MII_EEPROM); + if ((tmp & EEPROM_DATA_READ1) == 0) + break; + } + if (i <= 0) { + PRINTK (ERROR_MSG, PFX + "Failed on waiting for EEPROM bus busy signal\n"); + ret = -1; + } else { + i = 0xFFFF; + while (--i) { + writeb (EEPROM_SELECT | EEPROM_DIR_IN, + ax_base + AX88796_MII_EEPROM); + writeb ((EEPROM_SELECT | EEPROM_DIR_IN | + EEPROM_SHIFT_CLK), + ax_base + AX88796_MII_EEPROM); + tmp = readb (ax_base + AX88796_MII_EEPROM); + if (tmp & EEPROM_DATA_READ1) + break; + } + + if (i <= 0) { + PRINTK (ERROR_MSG, PFX + "Failed on waiting for EEPROM completion\n"); + ret = -1; + } + } + + writeb (0, ax_base + AX88796_MII_EEPROM); + + return ret; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: eeprom_read + * Purpose: + * ---------------------------------------------------------------------------- + */ + static unsigned short + eeprom_read (struct net_device *ndev, unsigned char loc) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + + unsigned short cmd = EEPROM_93C46_STARTBIT | + EEPROM_93C46_OPCODE (EEPROM_READ) | loc; + unsigned char tmp; + unsigned short retValue = 0; + int i; + + // issue a "SB OP Addr" command + for (i = 8; i >= 0 ; i--) { + tmp = (cmd & (1 << i)) == 0 ? + EEPROM_DATA_WRITE0 : EEPROM_DATA_WRITE1; + writeb (tmp | EEPROM_SELECT, ax_base + AX88796_MII_EEPROM); + writeb (tmp | EEPROM_SELECT | EEPROM_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + + // Turn + writeb (EEPROM_DIR_IN | EEPROM_SELECT, ax_base + AX88796_MII_EEPROM); + writeb (EEPROM_DIR_IN | EEPROM_SELECT | + EEPROM_SHIFT_CLK | EEPROM_DATA_WRITE1, + ax_base + AX88796_MII_EEPROM); + + // retriving the data + for (i = 15; i >= 0; i--) { + writeb (EEPROM_SELECT | EEPROM_DIR_IN, + ax_base + AX88796_MII_EEPROM); + tmp = readb (ax_base + AX88796_MII_EEPROM); + if (tmp & EEPROM_DATA_READ1) + retValue |= (1 << i); + writeb (EEPROM_SELECT | EEPROM_DIR_IN | EEPROM_SHIFT_CLK, + ax_base + AX88796_MII_EEPROM); + } + + writeb (0, ax_base + AX88796_MII_EEPROM); + + return retValue; + } + #endif /* #if (CONFIG_AX88796B_EEPROM_READ_WRITE == 1) */ + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_dump_regs + * Purpose: Dump all MAC registers + * ---------------------------------------------------------------------------- + */ + static void ax88796b_dump_regs (struct ax_device *ax_local) + { + void __iomem *ax_base = ax_local->membase; + u8 cr, i, j; + + cr = readb (ax_base + E8390_CMD) & E8390_PAGE_MASK; + PRINTK (DEBUG_MSG, " Page 0 Page 1 Page 2 Page 3\n"); + for (i = 0; i < 0x1F; i++) { + + PRINTK (DEBUG_MSG, " 0x%02x ", i); + for (j = 0; j < 4; j++) { + writeb (cr | (j << 6), ax_base + E8390_CMD); + + PRINTK (DEBUG_MSG, "0x%02x ", + readb (ax_base + EI_SHIFT (i))); + } + PRINTK (DEBUG_MSG, "\n"); + } + PRINTK (DEBUG_MSG, "\n"); + + writeb (cr | E8390_PAGE0, ax_base + E8390_CMD); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_dump_phy_regs + * Purpose: Dump PHY register from MR0 to MR5 + * ---------------------------------------------------------------------------- + */ + static void ax88796b_dump_phy_regs (struct ax_device *ax_local) + { + int i; + + PRINTK (DEBUG_MSG, "Dump PHY registers:\n"); + for (i = 0; i < 6; i++) { + PRINTK (DEBUG_MSG, " MR%d = 0x%04x\n", i, + mdio_read (ax_local->ndev, 0x10, i)); + } + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_get_drvinfo + * Purpose: Exported for Ethtool to query the driver version + * ---------------------------------------------------------------------------- + */ + static void ax88796b_get_drvinfo (struct net_device *ndev, + struct ethtool_drvinfo *info) + { + /* Inherit standard device info */ + strncpy (info->driver, DRV_NAME, sizeof info->driver); + strncpy (info->version, DRV_VERSION, sizeof info->version); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_get_link + * Purpose: Exported for Ethtool to query the media link status + * ---------------------------------------------------------------------------- + */ + static u32 ax88796b_get_link (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + + return ax_get_link (ax_local); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_get_wol + * Purpose: Exported for Ethtool to query wake on lan setting + * ---------------------------------------------------------------------------- + */ + static void + ax88796b_get_wol (struct net_device *ndev, struct ethtool_wolinfo *wolinfo) + { + struct ax_device *ax_local = ax_get_priv (ndev); + + wolinfo->supported = WAKE_PHY | WAKE_MAGIC; + wolinfo->wolopts = 0; + + if (ax_local->wol & WAKEUP_LSCWE) + wolinfo->wolopts |= WAKE_PHY; + if (ax_local->wol & WAKE_MAGIC) + wolinfo->wolopts |= WAKE_MAGIC; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_set_wol + * Purpose: Exported for Ethtool to set the wake on lan setting + * ---------------------------------------------------------------------------- + */ + static int + ax88796b_set_wol (struct net_device *ndev, struct ethtool_wolinfo *wolinfo) + { + struct ax_device *ax_local = ax_get_priv (ndev); + + ax_local->wol = 0; + + if (wolinfo->wolopts & WAKE_PHY) + ax_local->wol |= WAKEUP_LSCWE; + if (wolinfo->wolopts & WAKE_MAGIC) + ax_local->wol |= WAKEUP_MP; + + return 0; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_get_settings + * Purpose: Exported for Ethtool to query PHY setting + * ---------------------------------------------------------------------------- + */ + static int + ax88796b_get_settings (struct net_device *ndev, struct ethtool_link_ksettings *cmd) + { + struct ax_device *ax_local = ax_get_priv (ndev); + + mii_ethtool_get_link_ksettings(&ax_local->mii, cmd); + return 0; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_set_settings + * Purpose: Exported for Ethtool to set PHY setting + * ---------------------------------------------------------------------------- + */ + static int + ax88796b_set_settings (struct net_device *ndev, const struct ethtool_link_ksettings *cmd) + { + struct ax_device *ax_local = ax_get_priv (ndev); + int retval; + + retval = mii_ethtool_set_link_ksettings(&ax_local->mii, cmd); + + return retval; + + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_nway_reset + * Purpose: Exported for Ethtool to restart PHY autonegotiation + * ---------------------------------------------------------------------------- + */ + static int ax88796b_nway_reset (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + return mii_nway_restart(&ax_local->mii); + } + + struct ethtool_ops ax88796b_ethtool_ops = { + .get_drvinfo = ax88796b_get_drvinfo, + .get_link = ax88796b_get_link, + .get_wol = ax88796b_get_wol, + .set_wol = ax88796b_set_wol, + .get_link_ksettings = ax88796b_get_settings, + .set_link_ksettings = ax88796b_set_settings, + .nway_reset = ax88796b_nway_reset, + }; + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_load_macaddr + * Purpose: Load MAC address from EEPROM + * ---------------------------------------------------------------------------- + */ + static void + ax88796b_load_macaddr (struct net_device *ndev, unsigned char *pMac) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + int i; + struct {unsigned char value, offset; } program_seq[] = + { + {E8390_NODMA | E8390_PAGE0 | E8390_STOP, E8390_CMD}, + {ax_local->bus_width, EN0_DCFG}, + {0x00, EN0_RCNTLO}, + {0x00, EN0_RCNTHI}, + {0x00, EN0_IMR}, + {0xFF, EN0_ISR}, + {E8390_RXOFF, EN0_RXCR}, + {E8390_TXOFF, EN0_TXCR}, + {0x0C, EN0_RCNTLO}, + {0x00, EN0_RCNTHI}, + {0x00, EN0_RSARLO}, + {0x00, EN0_RSARHI}, + {E8390_RREAD | E8390_START, E8390_CMD}, + }; + + /* Read the 12 bytes of station address PROM. */ + for (i = 0; i < sizeof (program_seq)/sizeof (program_seq[0]); i++) + writeb (program_seq[i].value, ax_base + program_seq[i].offset); + + while (( readb (ax_base + EN0_SR) & 0x20) == 0); + + for (i = 0; i < 6; i++) + pMac[i] = (unsigned char) READ_FIFO (ax_base + EN0_DATAPORT); + + writeb (ENISR_RDC, ax_base + EN0_ISR); /* Ack intr. */ + + /* Support for No EEPROM */ + if (!is_valid_ether_addr (pMac)) { + PRINTK (DRIVER_MSG, "Use random MAC address\n"); + random_ether_addr(pMac); + } + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_set_macaddr + * Purpose: Set MAC addres into hardware + * ---------------------------------------------------------------------------- + */ + static void ax88796b_set_macaddr (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + u8 i; + + /* Copy the station address into the DS8390 registers. */ + writeb (E8390_NODMA | E8390_PAGE1, ax_base + E8390_CMD); + writeb (NESM_START_PG + TX_PAGES + 1, ax_base + EN1_CURPAG); + for (i = 0; i < 6; i++) + { + writeb (ndev->dev_addr[i], ax_base + EN1_PHYS_SHIFT (i)); + if (readb (ax_base + EN1_PHYS_SHIFT (i))!=ndev->dev_addr[i]) + PRINTK (ERROR_MSG, PFX + "Hw. address read/write mismap %d\n", i); + } + writeb (E8390_NODMA | E8390_PAGE0, ax_base + E8390_CMD); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_set_mac_address + * Purpose: Exported for upper layer + * ---------------------------------------------------------------------------- + */ + static int ax88796b_set_mac_address (struct net_device *ndev, void *p) + { + struct ax_device *ax_local = ax_get_priv (ndev); + struct sockaddr *addr = p; + unsigned long flags; + + if (!is_valid_ether_addr(addr->sa_data)) + return -EADDRNOTAVAIL; + + memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); + + spin_lock_irqsave (&ax_local->page_lock, flags); + ax88796b_set_macaddr (ndev); + spin_unlock_irqrestore (&ax_local->page_lock, flags); + + return 0; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_reset + * Purpose: Reset AX88796B MAC + * ---------------------------------------------------------------------------- + */ + static void ax88796b_reset (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + unsigned long reset_start_time = jiffies; + + readb (ax_base + EN0_RESET); + + ax_local->dmaing = 0; + + while ((readb (ax_base + EN0_SR) & ENSR_DEV_READY) == 0) { + if (jiffies - reset_start_time > 2*HZ/100) { + PRINTK (ERROR_MSG, PFX + " reset did not complete.\n"); + break; + } + } + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_get_stats + * Purpose: Collect the stats. + * ---------------------------------------------------------------------------- + */ + static struct net_device_stats *ax88796b_get_stats (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + unsigned long flags; + + /* If the card is stopped, just return the present stats. */ + if (!netif_running (ndev)) + return &ax_local->stat; + + spin_lock_irqsave (&ax_local->page_lock,flags); + /* Read the counter registers, assuming we are in page 0. */ + ax_local->stat.rx_frame_errors += readb (ax_base + EN0_COUNTER0); + ax_local->stat.rx_crc_errors += readb (ax_base + EN0_COUNTER1); + ax_local->stat.rx_missed_errors+= readb (ax_base + EN0_COUNTER2); + spin_unlock_irqrestore (&ax_local->page_lock, flags); + + return &ax_local->stat; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: make_mc_bits + * Purpose: + * ---------------------------------------------------------------------------- + */ + static inline void make_mc_bits (u8 *bits, struct net_device *ndev) + { + u32 crc; + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) + struct dev_mc_list *dmi; + for (dmi=ndev->mc_list; dmi; dmi=dmi->next) { + if (dmi->dmi_addrlen != ETH_ALEN) { + PRINTK (INIT_MSG, PFX + " invalid multicast address length given.\n"); + continue; + } + crc = ether_crc (ETH_ALEN, dmi->dmi_addr); + /* + * The 8390 uses the 6 most significant bits of the + * CRC to index the multicast table. + */ + bits[crc >> 29] |= (1 << ((crc >> 26) & 7)); + } + #else + struct netdev_hw_addr *ha; + netdev_for_each_mc_addr (ha, ndev) { + crc = ether_crc (ETH_ALEN, ha->addr); + bits[crc >> 29] |= (1 << ((crc >> 26) & 7)); + } + #endif + } + + + /* + * ---------------------------------------------------------------------------- + * Function Name: do_set_multicast_list + * Purpose: Set RX mode and multicast filter + * ---------------------------------------------------------------------------- + */ + static void do_set_multicast_list (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + int i; + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) + int mc_count = ndev->mc_count; + #else + int mc_count = netdev_mc_count (ndev); + #endif + + if (!(ndev->flags & (IFF_PROMISC | IFF_ALLMULTI))) { + memset (ax_local->mcfilter, 0, 8); + if (mc_count) + make_mc_bits (ax_local->mcfilter, ndev); + } else { + /* mcast set to accept-all */ + memset (ax_local->mcfilter, 0xFF, 8); + } + + if (netif_running (ndev)) + writeb (E8390_RXCONFIG, ax_base + EN0_RXCR); + + writeb (E8390_NODMA | E8390_PAGE1, ax_base + E8390_CMD); + for (i = 0; i < 8; i++) { + writeb (ax_local->mcfilter[i], ax_base + EN1_MULT_SHIFT (i)); + } + writeb (E8390_NODMA | E8390_PAGE0, ax_base + E8390_CMD); + + if (ndev->flags&IFF_PROMISC) + writeb (E8390_RXCONFIG | 0x18, ax_base + EN0_RXCR); + else if (ndev->flags & IFF_ALLMULTI || mc_count) + writeb (E8390_RXCONFIG | 0x08, ax_base + EN0_RXCR); + else + writeb (E8390_RXCONFIG, ax_base + EN0_RXCR); + } + + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_set_multicast_list + * Purpose: Exported for upper layer + * ---------------------------------------------------------------------------- + */ + static void ax88796b_set_multicast_list (struct net_device *ndev) + { + unsigned long flags; + struct ax_device *ax_local = ax_get_priv (ndev); + + PRINTK (DEBUG_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + spin_lock_irqsave (&ax_local->page_lock, flags); + do_set_multicast_list (ndev); + spin_unlock_irqrestore (&ax_local->page_lock, flags); + + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + } + + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796_PHY_init + * Purpose: Initialize PHY media mode + * ---------------------------------------------------------------------------- + */ + static int ax88796_PHY_init (struct net_device *ndev, u8 echo) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + u16 advertise; + u16 phy14h, phy15h, phy16h; + u8 rty_cnt; + + /* Enable AX88796B FOLW CONTROL */ + writeb (ENFLOW_ENABLE, ax_base+EN0_FLOW); + + rty_cnt = 0; + restart: + mdio_write (ndev, 0x10, 0x14, 0x742C); + phy14h = mdio_read (ndev, 0x10, 0x14); + phy15h = mdio_read (ndev, 0x10, 0x15); + phy16h = mdio_read (ndev, 0x10, 0x16); + if ((phy14h != 0x742C) || (phy15h != 0x03c8) || (phy16h != 0x4044)) { + mdio_write (ndev, 0x10, 0x15, 0x03c8); + mdio_write (ndev, 0x10, 0x16, 0x4044); + if (rty_cnt == 0) { + PRINTK (DRIVER_MSG, PFX "Restore PHY default setting"); + } else if (++rty_cnt > 10) { + PRINTK (ERROR_MSG, PFX + "Failed to restore PHY default setting"); + return -EIO; + } + goto restart; + } + + advertise = mdio_read (ndev, 0x10, MII_ADVERTISE) & ~ADVERTISE_ALL; + + switch (ax_local->media) { + case MEDIA_AUTO: + if (echo) + PRINTK (DRIVER_MSG, PFX + " The media mode is autosense.\n"); + advertise |= ADVERTISE_ALL | 0x400; + break; + + case MEDIA_100FULL: + if (echo) + PRINTK (DRIVER_MSG, PFX + " The media mode is forced to 100full.\n"); + advertise |= ADVERTISE_100FULL | 0x400; + break; + + case MEDIA_100HALF: + if (echo) + PRINTK (DRIVER_MSG, PFX + " The media mode is forced to 100half.\n"); + advertise |= ADVERTISE_100HALF; + break; + + case MEDIA_10FULL: + if (echo) + PRINTK (DRIVER_MSG, PFX + " The media mode is forced to 10full.\n"); + advertise |= ADVERTISE_10FULL; + break; + + case MEDIA_10HALF: + if (echo) + PRINTK (DRIVER_MSG, PFX + " The media mode is forced to 10half.\n"); + advertise |= ADVERTISE_10HALF; + break; + default: + advertise |= ADVERTISE_ALL | 0x400; + break; + } + + mdio_write (ndev, 0x10, MII_ADVERTISE, advertise); + mii_nway_restart (&ax_local->mii); + + return 0; + } + + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_init + * Purpose: Initialize MAC registers + * ---------------------------------------------------------------------------- + */ + static int ax88796b_init (struct net_device *ndev, int startp) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + int ret = 0; + + /* Follow National Semi's recommendations for initing the DP83902. */ + writeb (E8390_NODMA | E8390_PAGE0 | E8390_STOP, ax_base + E8390_CMD); + writeb (ax_local->bus_width, ax_base + EN0_DCFG);/* 8-bit or 16-bit */ + + // /* Set AX88796B interrupt active high */ + // writeb (ENBTCR_INT_ACT_HIGH, ax_base + EN0_BTCR); + + /* Clear the remote byte count registers. */ + writeb (0x00, ax_base + EN0_RCNTLO); + writeb (0x00, ax_base + EN0_RCNTHI); + + /* Set to monitor and loopback mode -- this is vital!. */ + writeb (E8390_RXOFF, ax_base + EN0_RXCR); /* 0x20 */ + writeb (E8390_TXOFF, ax_base + EN0_TXCR); /* 0x02 */ + + /* Set the transmit page and receive ring. */ + writeb (NESM_START_PG, ax_base + EN0_TPSR); + writeb (NESM_RX_START_PG, ax_base + EN0_STARTPG); + writeb (NESM_RX_START_PG, ax_base + EN0_BOUNDARY); + + /* assert boundary+1 */ + ax_local->current_page = NESM_RX_START_PG + 1; + writeb (NESM_STOP_PG, ax_base + EN0_STOPPG); + + ax_local->tx_prev_ctepr = 0; + ax_local->tx_start_page = NESM_START_PG; + ax_local->tx_curr_page = NESM_START_PG; + ax_local->tx_stop_page = NESM_START_PG + TX_PAGES; + + /* Clear the pending interrupts and mask. */ + writeb (0xFF, ax_base + EN0_ISR); + writeb (0x00, ax_base + EN0_IMR); + + ax88796b_set_macaddr (ndev); + + if (startp) + { + ret = ax88796_PHY_init (ndev, 1); + if (ret != 0) + return ret; + + /* Enable AX88796B TQC */ + writeb ((readb (ax_base+EN0_MCR) | ENTQC_ENABLE), + ax_base+EN0_MCR); + + /* Enable AX88796B Transmit Buffer Ring */ + writeb (E8390_NODMA | E8390_PAGE3 | E8390_STOP, + ax_base+E8390_CMD); + writeb (ENTBR_ENABLE, ax_base+EN3_TBR); + writeb (E8390_NODMA | E8390_PAGE0 | E8390_STOP, + ax_base+E8390_CMD); + + writeb (0xff, ax_base + EN0_ISR); + writeb (ENISR_ALL, ax_base + EN0_IMR); + writeb (E8390_NODMA | E8390_PAGE0 | E8390_START, + ax_base+E8390_CMD); + writeb (E8390_TXCONFIG, ax_base + EN0_TXCR); /* xmit on. */ + + writeb (E8390_RXCONFIG, ax_base + EN0_RXCR); /* rx on, */ + do_set_multicast_list (ndev); /* (re)load the mcast table */ + } + + return ret; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax_media_link + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void ax_media_link (struct net_device *ndev) + { + u16 phy_reg; + + phy_reg = mdio_read (ndev, 0x10, MII_BMCR); + + PRINTK (DRIVER_MSG, "%s: link up, %sMbps, %s-duplex\n", + ndev->name, (phy_reg & BMCR_SPEED100 ? "100" : "10"), + (phy_reg & BMCR_FULLDPLX ? "Full" : "Half")); + + netif_carrier_on (ndev); + netif_wake_queue (ndev); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax_get_link + * Purpose: + * ---------------------------------------------------------------------------- + */ + static int ax_get_link (struct ax_device *ax_local) + { + u8 nway_done = 1; + u16 phy_reg; + + phy_reg = mdio_read (ax_local->ndev, 0x10, MII_BMCR); + if (phy_reg & BMCR_ANENABLE) + nway_done = (mdio_read (ax_local->ndev, 0x10, MII_BMSR) & + BMSR_ANEGCOMPLETE) ? 1 : 0; + + if (nway_done) + return mii_link_ok (&ax_local->mii); + + return 0; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_watchdog + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void ax88796b_watchdog (struct timer_list *t) + { + struct ax_device *ax_local = from_timer(ax_local, t, watchdog); + struct net_device *ndev = ax_local->ndev; + unsigned long time_to_wake = AX88796_WATCHDOG_PERIOD_50MS; + u8 link; + u16 phy_reg; + + switch (ax_local->state) { + case wait_autoneg: + + if (ax_get_link (ax_local)) { + ax_media_link (ndev); + ax_local->state = chk_link; + } else if (ax_local->tick_times-- < 0) { + ax_local->state = chk_cable_exist; + ax_local->tick_times = (1800 / 50); //1.8s + } + break; + case chk_link: + link = ax_get_link (ax_local); + + if (netif_carrier_ok(ndev) != link) { + + if (link) { + ax_media_link (ndev); + ax_local->state = chk_link; + } else { + netif_stop_queue (ndev); + netif_carrier_off (ndev); + PRINTK (DRIVER_MSG, + "%s Link down.\n", ndev->name); + ax_local->state = chk_cable_exist; + ax_local->tick_times = (1800 / 50); //1.8s + } + } + break; + case chk_cable_exist: + phy_reg = mdio_read (ndev, 0x10, 0x12); + if ((phy_reg != 0x8012) && (phy_reg != 0x8013)) { + mdio_write (ndev, 0x10, 0x16, 0x4040); + mii_nway_restart(&ax_local->mii); + ax_local->state = chk_cable_status; + time_to_wake = AX88796_WATCHDOG_PERIOD_500MS; + ax_local->tick_times = (4 * 1000 / 500); //4s + } else if (--ax_local->tick_times <= 0) { + mii_nway_restart(&ax_local->mii); + ax_local->state = chk_cable_exist_again; + ax_local->tick_times = (6 * 1000 / 50); //6s + } + break; + case chk_cable_exist_again: + /* if cable disconnected */ + phy_reg = mdio_read (ndev, 0x10, 0x12); + if ((phy_reg != 0x8012) && (phy_reg != 0x8013)) { + mii_nway_restart(&ax_local->mii); + ax_local->state = chk_cable_status; + time_to_wake = AX88796_WATCHDOG_PERIOD_500MS; + ax_local->tick_times = (4 * 1000 / 500); //4s + } else if (--ax_local->tick_times <= 0) { + + ax_local->phy_advertise = mdio_read (ndev, 0x10, + MII_ADVERTISE); + ax_local->phy_bmcr = mdio_read (ndev, 0x10, MII_BMCR); + mdio_write (ndev, 0x10, MII_BMCR, BMCR_PDOWN); + time_to_wake = AX88796_WATCHDOG_PERIOD_3S; + ax_local->state = phy_power_up; + } + break; + + case chk_cable_status: + + if (ax_get_link (ax_local)) { + ax_local->state = chk_link; + } else if (--ax_local->tick_times <= 0) { + + mdio_write (ndev, 0x10, 0x16, 0x4040); + mii_nway_restart(&ax_local->mii); + ax_local->state = chk_cable_exist_again; + ax_local->tick_times = (6 * 1000 / 50); //6s + } else { + time_to_wake = AX88796_WATCHDOG_PERIOD_500MS; + } + break; + case phy_power_up: + /* Restore default setting */ + mdio_write (ndev, 0x10, MII_BMCR, ax_local->phy_bmcr); + mdio_write (ndev, 0x10, MII_ADVERTISE, ax_local->phy_advertise); + mdio_write (ndev, 0x10, 0x16, 0x4044); + mii_nway_restart(&ax_local->mii); + + ax_local->state = chk_cable_exist_again; + ax_local->tick_times = (6 * 1000 / 50); //6s + break; + default: + break; + } + + mod_timer (&ax_local->watchdog, jiffies + time_to_wake); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_get_hdr + * Purpose: Grab the 796b specific header + * ---------------------------------------------------------------------------- + */ + static void + ax88796b_get_hdr (struct net_device *ndev, + struct ax_pkt_hdr *hdr, int ring_page) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + u16 *buf = (u16 *)hdr; + + /* This shouldn't happen. If it does, it's the last thing you'll see */ + if (ax_local->dmaing) + { + PRINTK (ERROR_MSG, PFX + " DMAing conflict in ax88796b_get_hdr" + "[DMAstat:%d][irqlock:%d].\n", + ax_local->dmaing, ax_local->irqlock); + return; + } + + ax_local->dmaing |= 0x01; + + writeb (E8390_NODMA | E8390_PAGE0, ax_base+ E8390_CMD); + writeb (sizeof (struct ax_pkt_hdr), ax_base + EN0_RCNTLO); + writeb (0, ax_base + EN0_RCNTHI); + writeb (0, ax_base + EN0_RSARLO); /* On page boundary */ + writeb (ring_page, ax_base + EN0_RSARHI); + writeb (E8390_RREAD, ax_base + E8390_CMD); + + while (( readb (ax_base+EN0_SR) & ENSR_DMA_READY) == 0); + + *buf = READ_FIFO (ax_base + EN0_DATAPORT); + *(++buf) = READ_FIFO (ax_base + EN0_DATAPORT); + + writeb (ENISR_RDC, ax_base + EN0_ISR); /* Ack intr. */ + ax_local->dmaing = 0; + + le16_to_cpus (&hdr->count); + } + + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_block_input + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void + ax88796b_block_input (struct net_device *ndev, int count, + struct sk_buff *skb, int ring_offset) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + u16 *buf = (u16 *)skb->data; + u16 i; + + /* This shouldn't happen. If it does, it's the last thing you'll see */ + if (ax_local->dmaing) + { + PRINTK (ERROR_MSG, PFX " DMAing conflict in ne_block_input " + "[DMAstat:%d][irqlock:%d].\n", + ax_local->dmaing, ax_local->irqlock); + return; + } + + ax_local->dmaing |= 0x01; + + writeb (E8390_NODMA | E8390_PAGE0, ax_base + E8390_CMD); + writeb (count & 0xff, ax_base + EN0_RCNTLO); + writeb (count >> 8, ax_base + EN0_RCNTHI); + writeb (ring_offset & 0xff, ax_base + EN0_RSARLO); + writeb (ring_offset >> 8, ax_base + EN0_RSARHI); + writeb (E8390_RREAD, ax_base + E8390_CMD); + + + while ((readb (ax_base+EN0_SR) & ENSR_DMA_READY) == 0); + + #if (CONFIG_AX88796B_USE_MEMCPY == 1) + { + /* make the burst length be divided for 32-bit */ + i = ((count - 2) + 3) & 0x7FC; + + /* Read first 2 bytes */ + *buf = READ_FIFO (ax_base + EN0_DATAPORT); + + /* The address of ++buf should be agigned on 32-bit boundary */ + memcpy (++buf, ax_base+EN0_DATA_ADDR, i); + } + #else + { + for (i = 0; i < count; i += 2) { + *buf++ = READ_FIFO (ax_base + EN0_DATAPORT); + } + } + #endif + + writeb (ENISR_RDC, ax_base + EN0_ISR); /* Ack intr. */ + ax_local->dmaing = 0; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_receive + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void ax88796b_receive (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + unsigned char rxing_page, this_frame, next_frame; + unsigned short current_offset; + struct ax_pkt_hdr rx_frame; + int pkt_cnt = 0; + + PRINTK (DEBUG_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + while (pkt_cnt++ < 10) { + + int pkt_len, pkt_stat; + + /* Get the rx page (incoming packet pointer). */ + rxing_page = readb (ax_base + EN0_CURPAG); + + /* + * Remove one frame from the ring. + * Boundary is always a page behind. + */ + this_frame = readb (ax_base + EN0_BOUNDARY) + 1; + if (this_frame >= ax_local->stop_page) + this_frame = ax_local->rx_start_page; + + if (this_frame == rxing_page) { /* Read all the frames? */ + break; /* Done for now */ + } + current_offset = this_frame << 8; + ax88796b_get_hdr (ndev, &rx_frame, this_frame); + + PRINTK (DEBUG_MSG, PFX + " Current page 0x%x, boundary page 0x%x\n", + rxing_page, this_frame); + + pkt_len = rx_frame.count - sizeof (struct ax_pkt_hdr); + pkt_stat = rx_frame.status; + next_frame = this_frame + 1 + ((pkt_len + 4) >> 8); + + if (pkt_len < 60 || pkt_len > 1518) { + PRINTK (ERROR_MSG, PFX + " bogus pkt size: %d, status=%#2x nxpg=%#2x.\n", + rx_frame.count, rx_frame.status, rx_frame.next); + ax_local->stat.rx_errors++; + ax_local->stat.rx_length_errors++; + } else if ((pkt_stat & 0x0F) == ENRSR_RXOK) { + struct sk_buff *skb; + int status; + skb = dev_alloc_skb (pkt_len + 2); + if (skb == NULL) { + PRINTK (ERROR_MSG, PFX + " Couldn't allocate a sk_buff" + " of size %d.\n", pkt_len); + ax_local->stat.rx_dropped++; + break; + } + + /* IP headers on 16 byte boundaries */ + skb_reserve (skb, 2); + skb->dev = ndev; + skb_put (skb, pkt_len); /* Make room */ + ax88796b_block_input (ndev, pkt_len, skb, + current_offset + sizeof (rx_frame)); + + if (DEBUG_MSG & DEBUG_FLAGS) { + int i; + PRINTK (DEBUG_MSG, PFX + " Dump rx pkt %d", skb->len); + for (i = 0; i < skb->len; i++) { + if ((i % 16) == 0) + PRINTK (DEBUG_MSG, "\n"); + PRINTK (DEBUG_MSG, + "%02x ", *(skb->data + i)); + } + PRINTK (DEBUG_MSG, "\n"); + } + + skb->protocol = eth_type_trans (skb,ndev); + status = netif_rx (skb); + if (status != NET_RX_SUCCESS) + PRINTK (ERROR_MSG, + "netif_rx status %d\n", status); + + + ax_local->last_rx = jiffies; + ax_local->stat.rx_packets++; + ax_local->stat.rx_bytes += pkt_len; + if (pkt_stat & ENRSR_PHY) + ax_local->stat.multicast++; + } else { + PRINTK (ERROR_MSG, PFX + " bogus packet: status=%#2x" + " nxpg=%#2x size=%d\n", + rx_frame.status, rx_frame.next, rx_frame.count); + ax_local->stat.rx_errors++; + /* NB: The NIC counts CRC, frame and missed errors. */ + if (pkt_stat & ENRSR_FO) + ax_local->stat.rx_fifo_errors++; + } + next_frame = rx_frame.next; + + ax_local->current_page = next_frame; + writeb (next_frame-1, ax_base+EN0_BOUNDARY); + } + + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + + return; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax_trigger_send + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void + ax_trigger_send (struct net_device *ndev, unsigned int length, int start_page) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + + writeb (E8390_NODMA | E8390_PAGE0, ax_base + E8390_CMD); + writeb (length & 0xff, ax_base + EN0_TCNTLO); + writeb (length >> 8, ax_base + EN0_TCNTHI); + writeb (start_page, ax_base + EN0_TPSR); + + writeb (E8390_NODMA | E8390_TRANS, ax_base + E8390_CMD); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax_block_output + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void + ax_block_output (struct net_device *ndev, int count, + const unsigned char *buf, const int start_page) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + unsigned long dma_start; + + /* This shouldn't happen. If it does, it's the last thing you'll see */ + if (ax_local->dmaing) + { + PRINTK (ERROR_MSG, PFX " DMAing conflict in ne_block_output." + "[DMAstat:%d][irqlock:%d]\n", + ax_local->dmaing, ax_local->irqlock); + return; + } + + ax_local->dmaing |= 0x01; + + /* Now the normal output. */ + writeb (count & 0xff, ax_base + EN0_RCNTLO); + writeb (count >> 8, ax_base + EN0_RCNTHI); + writeb (0x00, ax_base + EN0_RSARLO); + writeb (start_page, ax_base + EN0_RSARHI); + + writeb (E8390_RWRITE, ax_base + E8390_CMD); + + #if (CONFIG_AX88796B_USE_MEMCPY == 1) + memcpy ((ax_base+EN0_DATA_ADDR), buf, ((count+ 3) & 0x7FC)); + #else + { + u16 i; + for (i = 0; i < count; i += 2) { + WRITE_FIFO (ax_base + EN0_DATAPORT, + *((u16 *)(buf + i))); + } + } + #endif + + dma_start = jiffies; + while ((readb(ax_base + EN0_ISR) & 0x40) == 0) { + if (jiffies - dma_start > 2*HZ/100) { /* 20ms */ + PRINTK (ERROR_MSG, PFX + " timeout waiting for Tx RDC.\n"); + ax88796b_reset (ndev); + ax88796b_init (ndev, 1); + break; + } + } + writeb (ENISR_RDC, ax_base + EN0_ISR); /* Ack intr. */ + + ax_local->dmaing = 0; + return; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_start_xmit + * Purpose: begin packet transmission + * ---------------------------------------------------------------------------- + */ + static int ax88796b_start_xmit (struct sk_buff *skb, struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + int send_length; + unsigned long flags; + u8 ctepr=0, free_pages=0, need_pages; + + PRINTK (DEBUG_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + send_length = skb->len; + + spin_lock_irqsave (&ax_local->page_lock, flags); + + writeb (E8390_PAGE0 | E8390_NODMA, ax_base + E8390_CMD); + + writeb (0x00, ax_base + EN0_IMR); + ax_local->irqlock = 1; + + need_pages = ((send_length - 1) >> 8) + 1; + + ctepr = readb (ax_base + EN0_CTEPR); + + if (ctepr & ENCTEPR_TXCQF) { + free_pages = 0; + } else if (ctepr == 0) { + + /* + * If someone issues STOP bit of command register at run time, + * the TX machine will stop the current transmission and the + * CTEPR register will be reset to zero. + * This is just precautionary measures. + */ + if (ax_local->tx_prev_ctepr != 0) { + ax_local->tx_curr_page = ax_local->tx_start_page; + ax_local->tx_prev_ctepr = 0; + } + + free_pages = ax_local->tx_stop_page - ax_local->tx_curr_page; + } + else if (ctepr < ax_local->tx_curr_page - 1) { + free_pages = ax_local->tx_stop_page - ax_local->tx_curr_page + + ctepr - ax_local->tx_start_page + 1; + } + else if (ctepr > ax_local->tx_curr_page - 1) { + free_pages = ctepr + 1 - ax_local->tx_curr_page; + } + else if (ctepr == ax_local->tx_curr_page - 1) { + if (ax_local->tx_full) + free_pages = 0; + else + free_pages = TX_PAGES; + } + + PRINTK (DEBUG_MSG, PFX " tx pkt len %d, need %d pages, free pages %d\n", + skb->len, need_pages, free_pages); + + if (free_pages < need_pages) { + PRINTK (DEBUG_MSG, "free_pages < need_pages\n"); + netif_stop_queue (ndev); + ax_local->tx_full = 1; + ax_local->irqlock = 0; + writeb (ENISR_ALL, ax_base + EN0_IMR); + spin_unlock_irqrestore (&ax_local->page_lock, flags); + return 1; + } + + if (DEBUG_MSG & DEBUG_FLAGS) { + int i; + PRINTK (DEBUG_MSG, PFX " Dump tx pkt %d", skb->len); + for (i = 0; i < skb->len; i++) { + if ((i % 16) == 0) + PRINTK (DEBUG_MSG, "\n"); + PRINTK (DEBUG_MSG, + "%02x ", *(skb->data + i)); + } + PRINTK (DEBUG_MSG, "\n"); + } + + ax_block_output (ndev, send_length, skb->data, ax_local->tx_curr_page); + ax_trigger_send (ndev, send_length, ax_local->tx_curr_page); + if (free_pages == need_pages) { + netif_stop_queue (ndev); + ax_local->tx_full = 1; + } + ax_local->tx_prev_ctepr = ctepr; + ax_local->tx_curr_page = ((ax_local->tx_curr_page + need_pages) < + ax_local->tx_stop_page) ? + (ax_local->tx_curr_page + need_pages) : + (need_pages - (ax_local->tx_stop_page - ax_local->tx_curr_page) + + ax_local->tx_start_page); + + ax_local->irqlock = 0; + writeb (ENISR_ALL, ax_base + EN0_IMR); + + spin_unlock_irqrestore (&ax_local->page_lock, flags); + + dev_kfree_skb (skb); + netif_trans_update(ndev); /* prevent tx timeout */ + // ndev->trans_start = jiffies; + ax_local->stat.tx_bytes += send_length; + + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + + return 0; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax_tx_intr + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void ax_tx_intr (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + int status = readb (ax_base + EN0_TSR); + + ax_local->tx_full = 0; + if (netif_queue_stopped (ndev)) + netif_wake_queue (ndev); + + /* Minimize Tx latency: update the statistics after we restart TXing. */ + if (status & ENTSR_COL) + ax_local->stat.collisions++; + if (status & ENTSR_PTX) + ax_local->stat.tx_packets++; + else + { + ax_local->stat.tx_errors++; + if (status & ENTSR_ABT) + { + ax_local->stat.tx_aborted_errors++; + ax_local->stat.collisions += 16; + } + if (status & ENTSR_CRS) + ax_local->stat.tx_carrier_errors++; + if (status & ENTSR_FU) + ax_local->stat.tx_fifo_errors++; + if (status & ENTSR_CDH) + ax_local->stat.tx_heartbeat_errors++; + if (status & ENTSR_OWC) + ax_local->stat.tx_window_errors++; + } + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax_tx_err + * Purpose: + * ---------------------------------------------------------------------------- + */ + static void ax_tx_err (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + + unsigned char txsr = readb (ax_base+EN0_TSR); + unsigned char tx_was_aborted = txsr & (ENTSR_ABT+ENTSR_FU); + + if (tx_was_aborted) + ax_tx_intr (ndev); + else { + ax_local->stat.tx_errors++; + if (txsr & ENTSR_CRS) ax_local->stat.tx_carrier_errors++; + if (txsr & ENTSR_CDH) ax_local->stat.tx_heartbeat_errors++; + if (txsr & ENTSR_OWC) ax_local->stat.tx_window_errors++; + } + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax_interrupt + * Purpose: + * ---------------------------------------------------------------------------- + */ + #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28) + static irqreturn_t ax_interrupt (int irq, void *dev_id) + #else + static irqreturn_t ax_interrupt (int irq, void *dev_id, struct pt_regs * regs) + #endif + { + struct net_device *ndev = dev_id; + int interrupts; + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + int int_serviced = 0; + + PRINTK (INT_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + if (ndev == NULL) + { + PRINTK (ERROR_MSG, + "net_interrupt(): irq %d for unknown device.\n", irq); + return IRQ_RETVAL (0); + } + + spin_lock (&ax_local->page_lock); + + writeb (E8390_NODMA | E8390_PAGE0, ax_base + E8390_CMD); + + writeb (0x00, ax_base + EN0_IMR); + + if (ax_local->irqlock) { + printk ("Interrupt occurred when irqlock locked\n"); + spin_unlock (&ax_local->page_lock); + return IRQ_RETVAL (0); + } + + while (++int_serviced < 12) { + + if ((interrupts = readb (ax_base + EN0_ISR)) == 0) + break; + + PRINTK (INT_MSG, PFX " isr = 0x%02x\n", interrupts); + + writeb (interrupts, ax_base + EN0_ISR); /* Ack the interrupts */ + + if (interrupts & ENISR_TX) { + PRINTK (INT_MSG, PFX " TX int\n"); + ax_tx_intr (ndev); + } + + if (interrupts & (ENISR_RX | ENISR_RX_ERR | ENISR_OVER)) { + PRINTK (INT_MSG, PFX " RX int\n"); + ax88796b_receive (ndev); + } + + if (interrupts & ENISR_TX_ERR) { + PRINTK (INT_MSG, PFX " TX err int\n"); + ax_tx_err (ndev); + } + + if (interrupts & ENISR_COUNTERS) { + ax_local->stat.rx_frame_errors += + readb (ax_base + EN0_COUNTER0); + ax_local->stat.rx_crc_errors += + readb (ax_base + EN0_COUNTER1); + ax_local->stat.rx_missed_errors += + readb (ax_base + EN0_COUNTER2); + writeb (ENISR_COUNTERS, ax_base + EN0_ISR); + } + + if (interrupts & ENISR_RDC) + writeb (ENISR_RDC, ax_base + EN0_ISR); + } + + writeb (ENISR_ALL, ax_base + EN0_IMR); + + spin_unlock (&ax_local->page_lock); + + PRINTK (INT_MSG, PFX " %s end ..........\n", __FUNCTION__); + + return IRQ_RETVAL (1); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_open + * Purpose: Open/initialize 796b + * ---------------------------------------------------------------------------- + */ + static int ax88796b_open (struct net_device *ndev) + { + unsigned long flags; + struct ax_device *ax_local = ax_get_priv (ndev); + int ret = 0; + + PRINTK (DEBUG_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + ret = request_irq (ndev->irq, &ax_interrupt, 0, ndev->name, ndev); + + if (ret) { + PRINTK (ERROR_MSG, PFX + " unable to get IRQ %d (errno=%d).\n", + ndev->irq, ret); + return -ENXIO; + } + + PRINTK (DEBUG_MSG, PFX " Request IRQ success !!\n"); + + spin_lock_irqsave (&ax_local->page_lock, flags); + + ax88796b_reset (ndev); + ret = ax88796b_init (ndev, 1); + if (ret != 0) { + spin_unlock_irqrestore (&ax_local->page_lock, flags); + free_irq (ndev->irq, ndev); + return ret; + } + + if (DEBUG_MSG & DEBUG_FLAGS) { + PRINTK (DEBUG_MSG, PFX + "Dump MAC registers after initialization:\n"); + ax88796b_dump_regs (ax_local); + ax88796b_dump_phy_regs (ax_local); + } + + netif_carrier_off (ndev); + netif_start_queue (ndev); + ax_local->irqlock = 0; + spin_unlock_irqrestore (&ax_local->page_lock, flags); + + ax_local->state = wait_autoneg; + ax_local->tick_times = (4 * 1000 / 40); //4S + + timer_setup(&ax_local->watchdog, ax88796b_watchdog, 0); + ax_local->watchdog.expires = jiffies + AX88796_WATCHDOG_PERIOD_50MS; + add_timer (&ax_local->watchdog); + + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + + return 0; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_close + * Purpose: + * ---------------------------------------------------------------------------- + */ + static int ax88796b_close (struct net_device *ndev) + { + struct ax_device *ax_local = ax_get_priv (ndev); + unsigned long flags; + + PRINTK (DEBUG_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + del_timer_sync (&ax_local->watchdog); + spin_lock_irqsave (&ax_local->page_lock, flags); + ax88796b_init (ndev, 0); + + free_irq (ndev->irq, ndev); + + spin_unlock_irqrestore (&ax_local->page_lock, flags); + netif_stop_queue (ndev); + + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + return 0; + } + + #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28) + const struct net_device_ops ax_netdev_ops = { + .ndo_open = ax88796b_open, + .ndo_stop = ax88796b_close, + .ndo_start_xmit = ax88796b_start_xmit, + .ndo_get_stats = ax88796b_get_stats, + .ndo_set_rx_mode = ax88796b_set_multicast_list, + .ndo_set_mac_address = ax88796b_set_mac_address, + }; + #endif + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax_probe + * Purpose: + * ---------------------------------------------------------------------------- + */ + static int ax_probe (struct net_device *ndev, struct ax_device *ax_local) + { + int i; + int reg0; + void *ax_base = ax_local->membase; + + PRINTK (DEBUG_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + reg0 = readb (ax_base); + if (reg0 == 0xFF) { + return -ENODEV; + } + + /* Do a preliminary verification that we have a 8390. */ + { + int regd; + writeb (E8390_NODMA | E8390_PAGE1 | E8390_STOP, + ax_base + E8390_CMD); + regd = readb (ax_base + EN0_COUNTER0); + writeb (0xff, ax_base + EN0_COUNTER0); + writeb (E8390_NODMA | E8390_PAGE0, ax_base + E8390_CMD); + /* Clear the counter by reading. */ + readb (ax_base + EN0_COUNTER0); + if (readb (ax_base + EN0_COUNTER0) != 0) { + writeb (reg0, ax_base); + /* Restore the old values. */ + writeb (regd, ax_base + EN0_COUNTER0); + return -ENODEV; + } + } + + printk (version); + + if (DEBUG_MSG & DEBUG_FLAGS) { + PRINTK (DEBUG_MSG, PFX + "Dump MAC registers before initialization:\n"); + ax88796b_dump_regs (ax_local); + ax88796b_dump_phy_regs (ax_local); + } + + /* Reset card. */ + { + unsigned long reset_start_time = jiffies; + + readb (ax_base + EN0_RESET); + while ((readb (ax_base + EN0_SR) & ENSR_DEV_READY) == 0) { + if (jiffies - reset_start_time > 2*HZ/100) { + PRINTK (ERROR_MSG, + " not found (no reset ack).\n"); + return -ENODEV; + break; + } + } + } + + #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28) + ndev->netdev_ops = &ax_netdev_ops; + #else + ndev->open = &ax88796b_open; + ndev->stop = &ax88796b_close; + ndev->hard_start_xmit = &ax88796b_start_xmit; + ndev->get_stats = &ax88796b_get_stats; + ndev->set_multicast_list = &ax88796b_set_multicast_list; + ndev->set_mac_address = ax88796b_set_mac_address, + #endif + + ndev->ethtool_ops = &ax88796b_ethtool_ops; + + ether_setup (ndev); + + ax_local->tx_start_page = NESM_START_PG; + ax_local->rx_start_page = NESM_RX_START_PG; + ax_local->stop_page = NESM_STOP_PG; + ax_local->media = media; + #if (CONFIG_AX88796B_8BIT_WIDE == 1) + ax_local->bus_width = 0; + #else + ax_local->bus_width = 1; + #endif + + spin_lock_init (&ax_local->page_lock); + + ax88796b_load_macaddr (ndev, ndev->dev_addr); + + PRINTK (DRIVER_MSG, "%s: MAC ADDRESS ",DRV_NAME); + for (i = 0; i < ETHER_ADDR_LEN; i++) { + PRINTK (DRIVER_MSG, " %2.2x", ndev->dev_addr[i]); + } + + PRINTK (DRIVER_MSG, "\n" PFX " found at 0x%x, using IRQ %d.\n", + (unsigned int)ax_base, ndev->irq); + + /* Initialize MII structure */ + ax_local->mii.dev = ndev; + ax_local->mii.mdio_read = mdio_read; + ax_local->mii.mdio_write = mdio_write; + ax_local->mii.phy_id = 0x10; + ax_local->mii.phy_id_mask = 0x1f; + ax_local->mii.reg_num_mask = 0x1f; + + ax88796b_init (ndev, 0); + + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + + return register_netdev (ndev); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_drv_probe + * Purpose: Driver get resource and probe + * ---------------------------------------------------------------------------- + */ + static int ax88796b_drv_probe(struct platform_device *pdev) + { + struct ax_device *ax_local; + struct resource *res = NULL; + void *addr; + int ret; + struct net_device *ndev; + + PRINTK (DEBUG_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + /* User can overwrite AX88796B's base address */ + if (!mem){ + + res = platform_get_resource (pdev, IORESOURCE_MEM, 0); + if (!res) { + printk("%s: get no resource !\n", DRV_NAME); + return -ENODEV; + } + + mem = res->start; + } + + /* Get the IRQ resource from kernel */ + if(!irq) + irq = platform_get_irq(pdev, 0); + + /* Request the regions */ + if (!request_mem_region (mem, AX88796B_IO_EXTENT, "ax88796b")) { + PRINTK (ERROR_MSG, PFX " request_mem_region fail !"); + return -EBUSY; + } + + addr = ioremap (mem, AX88796B_IO_EXTENT); + if (!addr) { + ret = -EBUSY; + goto release_region; + } + + ndev = alloc_etherdev (sizeof (struct ax_device)); + if (!ndev) { + PRINTK (ERROR_MSG, PFX " Could not allocate device.\n"); + ret = -ENOMEM; + goto unmap_region; + } + + SET_NETDEV_DEV(ndev, &pdev->dev); + platform_set_drvdata(pdev, ndev); + + ndev->base_addr = mem; + ndev->irq = irq; + + ax_local = ax_get_priv (ndev); + ax_local->membase = addr; + ax_local->ndev = ndev; + + ret = ax_probe (ndev, ax_local); + if (!ret) { + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + return 0; + } + + platform_set_drvdata (pdev, NULL); + free_netdev (ndev); + unmap_region: + iounmap (addr); + release_region: + release_mem_region (mem, AX88796B_IO_EXTENT); + + PRINTK (ERROR_MSG, PFX "not found (%d).\n", ret); + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + return ret; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_suspend + * Purpose: Device suspend handling function + * ---------------------------------------------------------------------------- + */ + static int + ax88796b_suspend(struct platform_device *p_dev, pm_message_t state) + { + struct net_device *ndev = dev_get_drvdata(&(p_dev)->dev); + struct ax_device *ax_local = ax_get_priv (ndev); + void *ax_base = ax_local->membase; + unsigned long flags; + + PRINTK (DEBUG_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + if (!ndev || !netif_running (ndev)) { + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + return 0; + } + + netif_device_detach (ndev); + netif_stop_queue (ndev); + + spin_lock_irqsave (&ax_local->page_lock, flags); + + writeb (E8390_NODMA | E8390_PAGE0, ax_base + E8390_CMD); + writeb (0x00, ax_base + EN0_IMR); + + if (ax_local->wol) { + u8 pme = 0; + + if (ax_local->wol & WAKEUP_LSCWE) { + pme |= ENWUCS_LSCWE; + PRINTK (DEBUG_MSG, PFX + " Enable link change wakeup\n"); + } + + if (ax_local->wol & WAKEUP_MP) { + pme |= ENWUCS_MPEN; + PRINTK (DEBUG_MSG, PFX + " Enable magic packet wakeup\n"); + } + + writeb (E8390_NODMA | E8390_PAGE3, ax_base + E8390_CMD); + writeb (pme, ax_base + EN3_WUCS); + + /* Enable D1 power saving */ + writeb (ENPMR_D1, ax_base + EN3_PMR); + + /* Set PME output type Push-Pull */ + writeb (E8390_NODMA | E8390_PAGE1, ax_base + E8390_CMD); + writeb (ENBTCR_PME_PULL, ax_base + EN0_BTCR); + writeb (E8390_NODMA | E8390_PAGE0, ax_base + E8390_CMD); + } else { + /* Enable D2 power saving */ + writeb (E8390_NODMA | E8390_PAGE3, ax_base + E8390_CMD); + writeb (ENPMR_D2, ax_base + EN3_PMR); + PRINTK (DEBUG_MSG, PFX " Enable D2 power saving mode\n"); + } + + spin_unlock_irqrestore (&ax_local->page_lock, flags); + + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + return 0; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_resume + * Purpose: Device resume handling function + * ---------------------------------------------------------------------------- + */ + static int + ax88796b_resume (struct platform_device *p_dev) + { + struct net_device *ndev = dev_get_drvdata(&(p_dev)->dev); + struct ax_device *ax_local = netdev_priv (ndev); + void __iomem *ax_base = ax_local->membase; + unsigned long flags; + int ret; + u8 pme; + + PRINTK (DEBUG_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + spin_lock_irqsave (&ax_local->page_lock, flags); + + if (ax_local->wol) { + writeb (E8390_NODMA | E8390_PAGE3, ax_base + E8390_CMD); + pme = readb (ax_base + EN3_WUCS); + if (pme & ENWUCS_LSC) { + PRINTK (DEBUG_MSG, PFX " Waked by link change\n"); + } else if (pme & ENWUCS_MPR) { + PRINTK (DEBUG_MSG, PFX " Waked by magic packet\n"); + } + } else { + writeb (0xFF, ax_base + EN0_RESET); + PRINTK (DEBUG_MSG, PFX " Host wakeup\n"); + mdelay (100); + } + + netif_device_attach (ndev); + + ax88796b_reset (ndev); + ret = ax88796b_init (ndev, 1); + + spin_unlock_irqrestore (&ax_local->page_lock, flags); + + if (ret == 0) + netif_start_queue (ndev); + + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + + return 0; + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_exit_module + * Purpose: Driver clean and exit + * ---------------------------------------------------------------------------- + */ + static int ax88796b_exit_module(struct platform_device *pdev) + { + struct net_device *ndev = platform_get_drvdata (pdev); + struct ax_device *ax_local = netdev_priv (ndev); + void __iomem *ax_base = ax_local->membase; + + PRINTK (DEBUG_MSG, PFX " %s beginning ..........\n", __FUNCTION__); + + platform_set_drvdata (pdev, NULL); + unregister_netdev (ndev); + iounmap (ax_base); + release_mem_region (mem, AX88796B_IO_EXTENT); + free_netdev (ndev); + + PRINTK (DEBUG_MSG, PFX " %s end ..........\n", __FUNCTION__); + + return 1; + } + + /*Fill platform driver information*/ + static struct platform_driver ax88796b_driver = { + .driver = { + .name = "ax88796b", + .owner = THIS_MODULE, + }, + .probe = ax88796b_drv_probe, + .remove = ax88796b_exit_module, + .suspend = ax88796b_suspend, + .resume = ax88796b_resume, + }; + + /* + * ---------------------------------------------------------------------------- + * Function Name: + * Purpose: Driver initialize + * ---------------------------------------------------------------------------- + */ + static int __init + ax88796b_init_mod(void) + { + + return platform_driver_register (&ax88796b_driver); + } + + /* + * ---------------------------------------------------------------------------- + * Function Name: ax88796b_exit_module + * Purpose: Platform driver unregister + * ---------------------------------------------------------------------------- + */ + static void __exit + ax88796b_cleanup(void) + { + + /* Unregister platform driver*/ + platform_driver_unregister (&ax88796b_driver); + } + + module_init(ax88796b_init_mod); + module_exit(ax88796b_cleanup); + diff -Ncr linux-5.11.1/drivers/net/ethernet/8390/ax88796b.h linux-5.11.1-shmin/drivers/net/ethernet/8390/ax88796b.h *** linux-5.11.1/drivers/net/ethernet/8390/ax88796b.h 1970-01-01 09:00:00.000000000 +0900 --- linux-5.11.1-shmin/drivers/net/ethernet/8390/ax88796b.h 2022-04-18 22:35:23.271125886 +0900 *************** *** 0 **** --- 1,280 ---- + /* Generic AX88796B register definitions. */ + /* This file is part of AX88796B drivers, and is distributed + under the same license.*/ + + #ifndef _ax88796_h + #define _ax88796_h + + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + + //#include + #include + #include + #include + + #include + + #define TX_PAGES 12 + + #define AX88796B_IO_EXTENT 0xFFF + + #define NESM_START_PG 0x40 /* First page of TX buffer */ + #define NESM_RX_START_PG (NESM_START_PG + TX_PAGES) /* First page of RX buffer */ + + #define NESM_STOP_PG 0x80 /* Last page +1 of RX ring */ + + #define ETHER_ADDR_LEN 6 + + #define AX88796B_BASE 0x08000000 + + /* The 796b specific per-packet-header format. */ + struct ax_pkt_hdr { + unsigned char status; /* status */ + unsigned char next; /* pointer to next packet. */ + unsigned short count; /* header + packet length in bytes */ + }; + + enum watchdog_state { + chk_link = 0, /* Routine A */ + chk_cable_exist, /* Called by A */ + chk_cable_exist_again, /* Routine B */ + phy_power_up, /* Called by B */ + chk_cable_status, /* Routine C */ + wait_autoneg, + }; + + /* Most of these entries should be in 'struct net_device' (or most of the + things in there should be here!) */ + /* You have one of these per-board */ + struct ax_device { + void *membase; + struct net_device *ndev; + unsigned char bus_width; + unsigned char mcfilter[8]; + unsigned char media; + unsigned char tx_curr_page, tx_prev_ctepr, tx_full; + unsigned char tx_start_page, tx_stop_page,rx_start_page, stop_page; + unsigned char current_page; /* Read pointer in buffer */ + spinlock_t page_lock; /* Page register locks */ + struct timer_list watchdog; + struct net_device_stats stat; /* The new statistics table. */ + unsigned irqlock:1; + unsigned dmaing:1; + + unsigned long last_rx; + + struct mii_if_info mii; + enum watchdog_state state; + int tick_times; + u16 phy_advertise; + u16 phy_bmcr; + + u8 wol; + # define WAKEUP_MP 0x01 + # define WAKEUP_LSCWE 0x02 + }; + + #define AX88796_WATCHDOG_PERIOD_50MS (HZ / 20) + #define AX88796_WATCHDOG_PERIOD_500MS (HZ / 2) + #define AX88796_WATCHDOG_PERIOD_3S (HZ * 3) + + /* Some generic ethernet register configurations. */ + + #define E8390_RXCONFIG 0x4 /* EN0_RXCR: broadcasts, no multicast,errors */ + #define E8390_RXOFF 0x20 /* EN0_RXCR: Accept no packets */ + #define E8390_TXCONFIG 0x80 /* EN0_TXCR: Normal transmit mode */ + #define E8390_TXOFF 0x02 /* EN0_TXCR: Transmitter off */ + + /* Register accessed at EN_CMD, the 8390 base addr. */ + #define E8390_STOP 0x01 /* Stop and reset the chip */ + #define E8390_START 0x02 /* Start the chip, clear reset */ + #define E8390_TRANS 0x04 /* Transmit a frame */ + #define E8390_RREAD 0x08 /* Remote read */ + #define E8390_RWRITE 0x10 /* Remote write */ + #define E8390_NODMA 0x20 /* Remote DMA */ + #define E8390_PAGE0 0x00 /* Select page chip registers */ + #define E8390_PAGE1 0x40 /* using the two high-order bits */ + #define E8390_PAGE2 0x80 /* Page 2 is invalid. */ + #define E8390_PAGE3 0xc0 /* Page 3 for AX88796B */ + #define E8390_PAGE_MASK 0x3F /* Mask of PAGES */ + + #ifdef CONFIG_SH_SHMIN + #define EI_SHIFT(x) (x) + #else + #define EI_SHIFT(x) ((x) << 1) + #endif /* CONFIG_SH_SHMIN */ + + #define E8390_CMD EI_SHIFT(0x00) /* The command register (for all pages) */ + /* Page 0 register offsets. */ + #define EN0_CLDALO EI_SHIFT(0x01) /* Low byte of current local dma addr RD */ + #define EN0_STARTPG EI_SHIFT(0x01) /* Starting page of ring bfr WR */ + #define EN0_CLDAHI EI_SHIFT(0x02) /* High byte of current local dma addr RD */ + #define EN0_STOPPG EI_SHIFT(0x02) /* Ending page +1 of ring bfr WR */ + #define EN0_BOUNDARY EI_SHIFT(0x03) /* Boundary page of ring bfr RD WR */ + #define EN0_TSR EI_SHIFT(0x04) /* Transmit status reg RD */ + #define EN0_TPSR EI_SHIFT(0x04) /* Transmit starting page WR */ + #define EN0_NCR EI_SHIFT(0x05) /* Number of collision reg RD */ + #define EN0_TCNTLO EI_SHIFT(0x05) /* Low byte of tx byte count WR */ + #define EN0_FIFO EI_SHIFT(0x06) /* FIFO RD */ + #define EN0_TCNTHI EI_SHIFT(0x06) /* High byte of tx byte count WR */ + #define EN0_CURPAG EI_SHIFT(0x06) /* RX current page */ + #define EN0_ISR EI_SHIFT(0x07) /* Interrupt status reg RD WR */ + #define EN0_CRDALO EI_SHIFT(0x08) /* low byte of current remote dma address RD */ + #define EN0_RSARLO EI_SHIFT(0x08) /* Remote start address reg 0 */ + #define EN0_CRDAHI EI_SHIFT(0x09) /* high byte, current remote dma address RD */ + #define EN0_RSARHI EI_SHIFT(0x09) /* Remote start address reg 1 */ + #define EN0_RCNTLO EI_SHIFT(0x0a) /* Remote byte count reg WR */ + #define EN0_RCNTHI EI_SHIFT(0x0b) /* Remote byte count reg WR */ + #define EN0_RSR EI_SHIFT(0x0c) /* rx status reg RD */ + #define EN0_RXCR EI_SHIFT(0x0c) /* RX configuration reg WR */ + #define EN0_TXCR EI_SHIFT(0x0d) /* TX configuration reg WR */ + #define EN0_COUNTER0 EI_SHIFT(0x0d) /* Rcv alignment error counter RD */ + #define EN0_DCFG EI_SHIFT(0x0e) /* Data configuration reg WR */ + #define EN0_COUNTER1 EI_SHIFT(0x0e) /* Rcv CRC error counter RD */ + #define EN0_IMR EI_SHIFT(0x0f) /* Interrupt mask reg WR */ + #define EN0_COUNTER2 EI_SHIFT(0x0f) /* Rcv missed frame error counter RD */ + #define EN0_DATAPORT EI_SHIFT(0x10) + #define EN0_PHYID EI_SHIFT(0x10) + #define AX88796_MII_EEPROM EI_SHIFT(0x14) + #define EN0_BTCR EI_SHIFT(0x15) /* Buffer Type Configure Register */ + #define EN0_SR EI_SHIFT(0X17) /* AX88796B Status Register */ + #define EN0_FLOW EI_SHIFT(0x1a) /* AX88796B Flow control register */ + #define EN0_MCR EI_SHIFT(0X1b) /* Mac configure register */ + #define EN0_CTEPR EI_SHIFT(0x1c) /* Current TX End Page */ + #define EN0_VID0 EI_SHIFT(0x1c) /* VLAN ID 0 */ + #define EN0_VID1 EI_SHIFT(0x1d) /* VLAN ID 1 */ + #define EN0_RESET EI_SHIFT(0X1f) /* Issue a read to reset, a write to clear. */ + + #define EN0_DATA_ADDR 0x0800 + + #define ENVLAN_ENABLE 0x08 + + /* Bits in EN0_ISR - Interrupt status register */ + #define ENISR_RX 0x01 /* Receiver, no error */ + #define ENISR_TX 0x02 /* Transmitter, no error */ + #define ENISR_RX_ERR 0x04 /* Receiver, with error */ + #define ENISR_TX_ERR 0x08 /* Transmitter, with error */ + #define ENISR_OVER 0x10 /* Receiver overwrote the ring */ + #define ENISR_COUNTERS 0x20 /* Counters need emptying */ + #define ENISR_RDC 0x40 /* remote dma complete */ + #define ENISR_RESET 0x80 /* Reset completed */ + #define ENISR_ALL (ENISR_RX | ENISR_TX | ENISR_RX_ERR | ENISR_TX_ERR | ENISR_OVER | ENISR_COUNTERS)/* Interrupts we will enable */ + + /* Bits in EN0_CTEPR */ + #define ENCTEPR_TXCQF 0x80 /* Transmit command queue full */ + + /* Bits in EN0_DCFG - Data config register */ + #define ENDCFG_WTS 0x01 /* word transfer mode selection */ + #define ENDCFG_BOS 0x02 /* byte order selection */ + + #define ENFLOW_ENABLE 0xc7 /* Flow Control Control Register */ + #define ENTQC_ENABLE 0x20 /* Enable TXQ */ + + #define EN3_TBR EI_SHIFT(0x0d) /* Transmit Buffer Ring Control Register */ + #define ENTBR_ENABLE 0x01 /* Enable Transmit Buffer Ring */ + + /* Page 1 register offsets. */ + #define EN1_PHYS EI_SHIFT(0x01) /* This board's physical enet addr RD WR */ + #define EN1_PHYS_SHIFT(i) EI_SHIFT(i+1) /* Get and set mac address */ + #define EN1_CURPAG EI_SHIFT(0x07) /* Current memory page RD WR */ + #define EN1_MULT EI_SHIFT(0x08) /* Multicast filter mask array (8 bytes) RD WR */ + #define EN1_MULT_SHIFT(i) EI_SHIFT(8+i) /* Get and set multicast filter */ + + /* Bits in received packet status byte and EN0_RSR*/ + #define ENRSR_RXOK 0x01 /* Received a good packet */ + #define ENRSR_CRC 0x02 /* CRC error */ + #define ENRSR_FAE 0x04 /* frame alignment error */ + #define ENRSR_FO 0x08 /* FIFO overrun */ + #define ENRSR_MPA 0x10 /* missed pkt */ + #define ENRSR_PHY 0x20 /* physical/multicast address */ + #define ENRSR_DIS 0x40 /* receiver disable. set in monitor mode */ + #define ENRSR_DEF 0x80 /* deferring */ + + /* Transmitted packet status, EN0_TSR. */ + #define ENTSR_PTX 0x01 /* Packet transmitted without error */ + #define ENTSR_ND 0x02 /* The transmit wasn't deferred. */ + #define ENTSR_COL 0x04 /* The transmit collided at least once. */ + #define ENTSR_ABT 0x08 /* The transmit collided 16 times, and was deferred. */ + #define ENTSR_CRS 0x10 /* The carrier sense was lost. */ + #define ENTSR_FU 0x20 /* A "FIFO underrun" occurred during transmit. */ + #define ENTSR_CDH 0x40 /* The collision detect "heartbeat" signal was lost. */ + #define ENTSR_OWC 0x80 /* There was an out-of-window collision. */ + + /* Bits in buffer type configure register */ + #define ENBTCR_PME_INT_EN 0x40 /* PME interrupt enable */ + #define ENBTCR_INT_ACT_HIGH 0x10 + #define ENBTCR_PME_PULL 0x02 + #define ENBTCR_PME_ACT_HIGH 0x01 + + /* Bits in device status register, EN0_SR */ + #define ENSR_DMA_DONE 0x40 /* Remote DMA completed */ + #define ENSR_DMA_READY 0x20 /* Remote DMA ready */ + #define ENSR_DEV_READY 0x10 /* Device ready */ + #define ENSR_SPEED_100 0x04 /* PHY link at 100 Mb/s */ + #define ENSR_DUPLEX_DULL 0x02 /* PHY link at full duplex */ + #define ENSR_LINK 0x01 /* PHY link up */ + + /* Power Management register offsets. */ + #define EN3_BM0 EI_SHIFT(0x01) + #define EN3_BM1 EI_SHIFT(0x02) + #define EN3_BM2 EI_SHIFT(0x03) + #define EN3_BM3 EI_SH2IFT(0x04) + #define EN3_BM10CRC EI_SHIFT(0x05) + #define EN3_BM32CRC EI_SHIFT(0x06) + #define EN3_BMOFST EI_SHIFT(0x07) + #define EN3_LSTBYT EI_SHIFT(0x08) + #define EN3_BMCD EI_SHIFT(0x09) + #define EN3_WUCS EI_SHIFT(0x0a) + #define EN3_PMR EI_SHIFT(0x0b) + + /* Bits in Wake up Control */ + #define ENWUCS_MPEN 0x01 + #define ENWUCS_WUEN 0x02 + #define ENWUCS_LSCWE 0x04 + #define ENWUCS_MPR 0x10 + #define ENWUCS_WUFR 0x20 + #define ENWUCS_LSC 0x40 + + /* Bits in PM Control */ + #define ENPMR_D1 0x01 + #define ENPMR_D2 0x02 + + #define MEDIA_AUTO 0 + #define MEDIA_100FULL 1 + #define MEDIA_100HALF 2 + #define MEDIA_10FULL 3 + #define MEDIA_10HALF 4 + + /* Debug Message Display Level Definition */ + #define DRIVER_MSG 0x0001 + #define INIT_MSG 0x0002 + #define TX_MSG 0x0004 + #define RX_MSG 0x0008 + #define INT_MSG 0x0010 + #define ERROR_MSG 0x0020 + #define WARNING_MSG 0x0040 + #define DEBUG_MSG 0x0080 + #define OTHERS_MSG 0x0100 + #define ALL_MSG 0x01FF + #define NO_MSG 0x0000 + #define DEFAULT_MSG (DRIVER_MSG | ERROR_MSG) + #define DEBUG_FLAGS DEFAULT_MSG + + #endif /* _8390_h */ diff -Ncr linux-5.11.1/drivers/rtc/rtc-sh.c linux-5.11.1-shmin/drivers/rtc/rtc-sh.c *** linux-5.11.1/drivers/rtc/rtc-sh.c 2021-02-23 21:55:57.000000000 +0900 --- linux-5.11.1-shmin/drivers/rtc/rtc-sh.c 2022-04-18 22:48:02.643266539 +0900 *************** *** 504,512 **** --- 504,516 ---- if (unlikely(!rtc->res)) return -EBUSY; + #ifdef CONFIG_CPU_SUBTYPE_SH7706 + rtc->regbase = (void __iomem *)res->start; + #else rtc->regbase = devm_ioremap(&pdev->dev, rtc->res->start, rtc->regsize); if (unlikely(!rtc->regbase)) return -EINVAL; + #endif if (!pdev->dev.of_node) { clk_id = pdev->id;